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TI/Burr-Brown Brews 14-bit 40 MHz A/D Converter in CMOS

The manufacturer says . . .

ChipCenter's Alex Mendelsohn says . . .

TI Introduces Industry's First 14 bit, 40 Msamples/s CMOS ADC for Wireless Communications, Medical Imaging, and Optical Networking Tucson, Ariz.--Texas Instruments introduced the industry's first 14 bit, 40 Msamples/s CMOS A/D converter from the company's Burr-Brown product line, targeting wireless communications, medical imaging, instrumentation, and optical networking. The device's CMOS process design provides dramatically lower power consumption than competitive products designed with BiCMOS or complementary bipolar technologies. In addition, the CMOS design allows TI to offer a high-performance 14-bit converter at much lower prices than competition in the 40 to 52 Msamples/s performance range. See www.ti.com/sc/hpa7427u/. The ADS5421 consumes only 850 mW, and features a power-down mode that reduces power consumption to a mere 40 mW. The device's signal-to-noise ratio performance of 75 dB and spurious-free dynamic range (SFDR) in excess of 80 dB makes this device suitable for a variety of high-end systems. Applications include baseband digitization in wideband communications systems, high-performance time-domain applications such as high-end video cameras or continuous-wave Doppler medical imaging, and monitoring of optical performance. "The ADS5421 represents the first CMOS 14-bit, 40 Msamples/s A/D converter to be released to market, and is a unique complement to TI's high-performance, high-speed data-converter portfolio. The implementation of CMOS technology brings the lowest power and lowest priced solution to this speed segment," said Ed Fullman, product marketing manager for TI's high-speed converter products. "In addition to improving the performance of existing applications, we are confident the ADS5421 will be an enabling technology for many emerging high-end applications." Wireless communications such as remote Web terminals, cellular location services, and digitization of single-channel CDMA signals can now be accomplished with a cost-effective solution. Lower power consumption will reduce the cost of power distribution components, further distancing the benefits of the ADS5421 from that of the competition. The ADS5421 operates on a single +5 V analog supply, and provides a high-bandwidth linear track-and-hold, an internal/external reference option, a flexible input range, and a low DNL of ± 0.5 LSB. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5 V p-p, further improving the SNR performance. It also accepts a single-ended clock signal, and has flexible threshold levels. Available Today The ADS5421 is available now in a small LQFP-64 package. Suggested resale pricing starts at $20.90 in 1,000-piece quantities.

The nearest competitive ICs to TI/Burr-Brown's new chip appear to be the Comlinear (now part of National Semiconductor) CLC952 and the Analog Devices Inc. (ADI) AD6644. The AD6644 is a 14-bit 65 Msamples/s monolithic device, but it's fabbed in ADI's complementary bipolar process, and as such its datasheet indicates that it typically dissipates 1.3 W. The CLC/National chip, on the other hand, while fabbed in biCMOS (a process comprising bipolar and CMOS transistor structures), typically dissipates 660 mW. But, it's only a 12-bit converter. Any way you look at it, B-B's 40 MHz power-managed ADS5421 is a high-performance surface-mount screamer. Fabbed 100 percent in CMOS, this high-res A/D converter uses a pipelined architecture where each stage in the pipeline contains low-resolution quantizers and digital error-correction logic. The result is that captured signals move through the A/D converter pipeline core at high sampling speed so that only very small capacitor values are needed in the sample-and-hold circuits. That keeps droop under control, as the capacitors don't need a high refresh rate. The pipelining also results in fast operation. Encoding takes place with a data latency of just ten clock cycles, after which the output can be read as a 14-bit parallel word encoded as straight offset binary or in a two's complement format. This IC should prove useful as a digitizers in RF spectrum analyzers and other communications-type test gear, or in ATE front-ends used for testing RF components. It could also serve admirably in a high-resolution data-acquisition system. Another strong card for Burr-Brown's A/D converter is its price tag. As company spokesman Pat Kirk points out, it's "reasonably priced," especially when couched in terms of performance, and should therefore open up more general-purpose applications for high-resolution and high-speed data conversion. "We're trying to make it affordable in sockets that presently use 12-bit converters," Kirk says. "Also, the fact that our chip is fabbed in CMOS should yield better SNR (signal-to-noise ratio) as well as higher spurious-free dynamic range (SFDR)." Switched-Cap Track-and-Hold The analog input of the '5421, with its differential switched-cap track-and-hold (T/H) also delivers noteworthy AC performance at its high sampling rate. The high-bandwidth linear T/H ensures low spurious-signal performance up to and beyond the Nyquist rate. The T/H also exhibits very low jitter (0.25 ps). That lowers the uncertainties associated with the variations in the period time when the T/H switch opens after a sample-and-hold transition occurs, or uncertainties associated with time variations in aperture delay. Single-Ended or Differential Operation With its high input bandwidth, the T/H circuit can also convert a single-ended input signal into a differential signal. Indeed, the chip's analog input can be configured in various ways and driven with a variety of circuits, depending on your application and desired level of performance. Differential operation permits the signal amplitude to be half of what would be needed for single-ended operation. That makes it easier to maintain good linearity from whatever signal source is feeding the chip. The ADS5421 has a 4 V (p-p) differential input range. Reduced-voltage signals also permit more interface headroom, broadening your choice of driver amplifier. Moreover, differential operation can cut even-order harmonics. Differential operation can also improve noise immunity, thanks to common-mode noise rejection. On the other hand, Burr-Brown points out that some applications may benefit from a single-ended configuration. For one thing, you may enjoy reduced circuit complexity, although driving the chip with a single-ended signal means a trade-off in terms of distortion. The ADS5421 does, however, operate from a single supply rail, which requires that each of its inputs be biased externally to a common-mode voltage (typically +2.5 V). click for full-size image This configuration permits a symmetrical signal swing, while maintaining sufficient headroom to either supply rail. However, some differential driver circuits may permit setting an appropriate common-mode voltage directly at the driver input. In these cases, you get the much simplified interface while eliminating the need for external biasing resistors, and possibly input coupling capacitors. Reference-Rich The ADS5421 is also reference-rich. In addition to a band-gap voltage reference, the chip packs a selectable gain amplifier for it, drivers for top and bottom references, and a resistive reference ladder. You can also use an external reference if you desire even better temperature stability, higher accuracy, or further full-scale (FS) range. click for full-size image If you use the internal reference, by simply strapping the chip's SEL pins you can select a variety of reference levels derived from the chip's band-gap circuit. Burr-Brown includes on-chip logic that delivers 1 V, 1.5 V, or 2 V reference outputs. The top and bottom outputs can also sink or source up to 1 mA of current to an external circuit. Another feature of the ADS5421 is the ability to drive the chip with either a single-ended or differential clock line, using either CMOS or TTL drivers. The IC's clocking input pin can also accept either a differential sine wave or a square wave (down to 500 mV p-p), with flexible threshold levels. Yet another feature is an over-range flag. It can be used to indicate if an input exceeds the converter's FS range. The flag can also be used to automatically adjust the gain of front-end signal-conditioning circuitry. Although TI/Burr-Brown pitches the ADS5421 primarily for baseband digitization applications in RF communications applications, this high-res chip should also find a home in test-and-measurement applications as well. Considering its low power (less than 1 W) and power management features, I think you'll agree that the IC can lend itself to a variety of high-end data-acq systems, especially low-power ones, where speed as well as dissipation are design considerations.

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