In IEEE-802.3ab signaling, timing measurements are derived primarily
from Test Mode 2 or Test Mode 3. For production testing, you can verify the timing performance of multi-level
signal Gigabit Ethernet (GbE) devices with a subset of tests. These can include transmitter timing-jitter and transmit
clock-frequency tests, and receiver frequency-tolerance tests. Let's look at these one at a time.
In transmitter timing-jitter tests, the transmit test clock from your device under test (DUT) is used to both generate a
differential signal output from the Medium-Dependent Interface (MDI—refer to
Part 1), and as a zero-crossing reference for measuring
peak-to-peak jitter.
The measurement itself requires peak-to-peak measurements of 0.3 ns or longer. This test also includes a high-pass filtered
jitter measurement that requires 105 clock edges, amounting to a tester time of at least 8 ms.
Next consider the transmit clock-frequency test. This test is used to show that the 5-level symbol transmission rate on
each pair is 125.00 MHz to within ± 0.01%. A tester would need to measure to within a resolution of at least 12.5 kHz.
The last subset is the receiver frequency-tolerance test. It's used to show that the receiver can receive incoming data
properly with a 5-level symbol rate of 125.00 MHz to within ± 0.01%. Like the transmit clock test, your tester would need
to measure to within a resolution of at least 12.5 kHz.
Today's Testers Can Handle It
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These timing tests specify measurements accurate to hundreds of picoseconds. That's a requirement well within the capability
of current cost-effective test equipment that's typically able to deliver edge-placement accuracy on the order of 150 ps.
Similarly, GbE timing-jitter requirements are on the order of 1000 ps. That, too, is well within the capability of current
test equipment that typically provides single-shot timing accuracy in the low tens of picoseconds.
Consequently, to all appearances, current timing-test requirements for PHY (physical-layer) devices using multi-level
signaling present little challenge for production test equipment. Yet, a persistent difficulty in dealing with evolving test
requirements is the ability to adapt test equipment to meet new and evolving test challenges. As with any emerging application,
new requirements will likely continue to arise, requiring new test resources and configurations.
To meet these changing requirements, test systems now offer modular test architectures that permit you, as a test engineer,
to respond to major changes in test requirements with simple, cost-effective field upgrades.
Functional Test Definitions
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Let's consider GbE again. Providing the foundation for functional testing of GbE devices, IEEE Test Mode 4 requires
the ability to encode data to a multi-level scrambled waveform. It also requires decoding a complex waveform to the corresponding
data stream. Along with the significant processing capability needed to handle this, suitable testers require test instrumentation
beyond conventional binary digital pins or digital comparator pins.
On the transmitter side, GbE devices require creating and transmitting a signal that's a hybrid, i.e., a digital signal with
analog characteristics.
Similarly, on the receiver side, standard binary digital comparators are insufficient. Instead, advanced arbitrary waveform
generator (AWG) capabilities are necessary to verify functionality. Transmitter distortion tests can be made, and receiver differential
input signals can be tested.
Transmitter distortion tests with no intervening cable are performed for each pair. This test requires measurement of the
differential signal output at the MDI with a peak distortion of less than 10 mV. The peak distortion is determined by sampling the
differential signal using the symbol rate provided by the DUT.
For its part, the receiver differential input signals test verifies the ability of the receiver to correctly translate symbols sent
from a remote transmitter over 100 m or more of CAT-5 cable. It's deemed successful if the bit error rate (BER) of the data transmitted
is less than 10-7 for 125 octet (8-bit) frames.
For this receiver test, your tester needs to transmit a pseudo-random pattern to the receiver on each wire pair that's properly
encoded and scrambled so that the data coming out of the PHY will match the prescrambled pattern. Because this type of testing can
potentially require significant test time, a tester needs to be able to minimize BER test times. Furthermore, the waveform generated
by the remote transmitter needs to satisfy the same transmit-waveform requirements as used in the test called Transmitter Peak
Differential Output Voltage and Level Accuracy.
Functional Test Demands
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Just as timing test challenges such as BER measurement can be expected to impact you more and more, functional test requirements can
be expected to expand significantly in the coming years, too. For example, the trend toward more highly integrated devices is likely to
bring additional test challenges, with PHY and MAC (media access control) layers combined in complex system-on-a-chip (SoC) devices. In
these cases, however, the additional test challenges are less likely to impact specific tester resource requirements. Instead, as a test
engineer, you'll likely face an increasing need for more sophisticated test programs that will fully test the functionality of
these highly integrated devices.
The Test Framework
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Let's summarize. We know that because of the benefit in reducing operating transmission bandwidth, multi-level signaling is rapidly
emerging as the preferred data-encoding method in advanced communications devices such as GbE, or backplane electronics, to name a few.
At the same time, the combination of complex functions and high performance presents significant challenges to OEMs seeking to cut
test costs and speed delivery of complex parts.
As a framework for device test, the IEEE standard's four test modes support a range of tests needed to verify signal integrity, timing,
and functionality. While the full set of IEEE recommendations offers an exhaustive set of tests needed to fully characterize a GbE or
high-speed backplane device in the lab, manufacturers can expect to deal with only a subset of these tests consistent with the need for
achieving high-quality results with small test times and high throughput.
Within this more limited set of production tests, however, the associated GbE test requirements dictate the need for more test capabilities.
More test capabilities include things such as advanced arbitrary waveform generators (ARBs), high-speed processing, and flexible
instrumentation with multiple independent differential channels.
Similarly, more flexible tester configurations will be needed to accommodate the evolving requirements for both timing and functional tests.
Likewise, more flexible modular test architectures will be needed to respond cost-effectively to new requirements associated with these
rapidly evolving applications.
About the Author
George Schroeder is senior applications engineer at Credence Systems Corp., Hillsboro, Oregon. Schroeder earned his BSEE from Oregon State
U. in 1971, along with a second BSB&T degree in Business. Today, he holds two patents for a method of controlling echo cancellers in
data-communication systems. Schroeder is also a member of the IEEE.
