The majority of the readers of this magazine are circuit designers, and I am a stranger to most: I work at the development of manufacturing processes for circuits instead of their design. I am pleased to know a few designers well, however, among them Barrie Gilbert, a coworker, who wrote last month's column. This article discusses insights I have gathered about analog IC manufacture over a few decades.

The thing that really started Analog ICs was the op-amp. The first commercially significant one was created by a somewhat flamboyant designer (letıs call him Bob) who worked with a companion process engineer (who weıll call Dave.) About the only process available then was a 5-V digital bipolar. These new op-amps were difficult to make with this process, even if the gold doping was left out. The op-amp needed 30-V breakdowns to accommodate the-then-standard analog supplies, and this required modifications to the TTL process.

Folklore has it that Dave modified the process for higher breakdown and in other ways to make Bob's circuits yield well. He optimized it for analog components, which are typically greater in variety and more demanding in quality than their digital counterparts. Dave did the right thing. Bob and Dave were the heroic "dynamic duo" that many of us sought to emulate in the 60s and 70s. Bob was somewhat of a tough act to follow, so I guess we process engineers had it easier than the circuit designers.

The "Bob and Dave" model was pretty good for a while. Many of us made advantageous, nearly Coulombic (sic) bonds with circuit designers. For example, we teamed with designers who complained regularly about the low Beta of the lateral pnp. Designers could not mathematically neglect the "1" in the expression Beta + 1, and made this vividly clear to those who would listen. When we did increase the Beta, designers complained about the current handling characteristics and speed, and then later about how Ie did not equal Ic + Ib.

Like Dave, we listened, and we began to make a lot of money making good pnp required for analog circuits. This worked so well we continued the practice on other components, e.g., JFETs. But there were some downsides to the "Bob and Dave" model. One of these is what we locally call "process proliferation". Each product required some manufacturing procedures that were a little bit different. "Tweaks" was the euphemistic word for the little changes. Little higher Beta here, little lower threshold there, little higher sheet resistance at boron diffusion, etc.

The gurus who parented the tweaks became occupied with newer products and forgot the subtleties of the old, and of course there was some personnel turnover. Yields fell, fun stopped, and we were on a treadmill trying to catch-up. We became self-limited; when marketing could sell it, we could not always deliver. We could not grow because we had too many problems. Quality was a problem too. Some of you can remember the product quality of the 70s and 80s, which was not always acceptable. The problem was aggravated by conservatism about mask-count. Managers, process engineers, and designers all agreed that it was imperative to minimize mask count.

To conserve masks, one would use the same doping for several components. One circuit I remember used the same boron doping for the npn, lateral pnp, diffused resistors, vertical pnp, supplementary doping for isolation, emitter-pinch resistors, epi- pinch resistors, buried Zener diodes, and a certain kind of very leaky junction capacitor. The doping profile was a function of a number of second-order things of which we had only the meekest control. This was a difficult product to maintain, and required an inordinate amount of engineering attention. Unfortunately, it was typical of manufacturing into the 80s. Die costs now are often a smaller percentage of the total product price, so we can afford more masks to decouple the dopings. This additional cost is often offset by a yield increase, greater delivery predictability, and better quality.

Another reason for today's success is higher unit volume. We can spread the cost of engineering and management over considerably more silicon. This allows concentration of engineering in areas needing it. When the CMOS guys presented photo-resist planarization, I proclaimed it ludicrous. It became a reality because they had the resources to make it work, in part because of their huge unit volume. I sequentially laughed at the next two forms of Spin-on-glass (SOG) planarization, and then guffawed about Chem-mechanical-polish (CMP) planarization. All of these are successful generations of planarization technology, and they were made so because engineering was available. High volume was a positive factor.

There are still some believers in the myth of the modular manufacturing process. The dream is that a circuit designer can choose process modules from a set that augments a process core and seamlessly interface together -- with no need to change SPICE parameters or distributions. For example, a core might be a standard bipolar process, and then one could add process modules for buried Zeners, JFETs, super Beta, double-poly caps, multiple-level interconnects, thin-film resistors, etc. This approach sounds great to designers and managers, and looks fantastic during overhead presentations in darkened rooms. Sometimes in the past it's been the only way to get backing from the bean counters. And now the rest of the story:

What usually happens is that the modules have to be engineered, and sometimes re-engineered to merge with each other, and n modules results in up to n_ process variations. The timing of this phase of engineering usually coincides with the first shipments to some important customer. The resulting process proliferation breeds unpredictable scheduling problems, and equipment utilization, a production control nightmare that drives up costs.

Now, nearing the turn of the century some changes have been made. Analog products have long product lifetimes, and attempts were made to shepherd sets of similar (read proliferated) manufacturing processes into a single universal process. These actions have ranged from being successful to actually breeding more marginally-different variations. Our moves to 6-inch wafers have allowed us to clean house, and we found the opportunity to retrofit some proven changes into the old 4-inch lines.

Consider this approach: A singular manufacturing process, full featured, with no modules, with broad appeal to circuit designers, and engineered tweak-free. Overkill for most applications, it is cheap because it runs in volume. We've engineered some processes lately that closely approximate this description.

There is an analogy with cars, and I hope I will not offend aficionados of rare autos. Another engineer and I noticed that the cars in volume production are debugged. They are cheaper too. I have owned two unusual cars that drew "oohs" and "ahs" because they were uncommon and lovely. One even had status pizzazz. The reason they were rare was because most buyers did not have the time to be always tweaking the carburetors, or fixing leaks, and could not afford them or the repairs in the first place. Sound familiar?