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By Barrie Gilbert, ADI Fellow; Manager, NW Labs, Beaverton, OR In a previous EDTN column about op-amps, I pointed out that, contrary to the prevailing dc-oriented view of these components, the ac gain dominates the behavior of a classical op-amp -- identified by the three-letter acronym OPA -- in the majority of signal-processing applications. Some minor typos crept into this still-experimental e-column, during the launch into cyberspace. One of these was that the ac gain was shown as fS/f1, where fS is the signal frequency and f1 is the unity-gain crossover frequency. Obviously, this should have read f1/fS. From this starting point, we noted that a "100-MHz op-amp" will provide an ac gain of merely five at 20 MHz, which is a far cry from the "infinity" that is often reckoned as the ideal for an OPA. (Say after me, a hundred times: "Op-amps have very low open-loop ac gain".) Is this little detail important in practice? You betcha. Low open-loop gain does a lot more harm than merely reducing the closed-loop gain magnitude: it very strongly influences distortion, a topic to be picked up in a later column, when we'll look at the consequences of the nonlinear behavior of the OPA. This topic is poorly treated in many of the textbooks about op-amps, which cling excessively to the idea of a simple, linear 'one-pole' model, having an idealized transfer function A(s) = AO/(1+sTO). These further columns will show how modern designs have evolved to address the matter of distortion, either by an appeal to high-speed technologies, or the use of novel amplifier architectures. It was also pointed out that even if one had an OPA that was ideal in another one of the textbook ways, that is, having infinite bandwidth, it would be impossible to use it. I suggested that you should do a few little simulations to prove that to yourself. Did you try these? This column will play a few experimental games, using simulation based on some highly idealized op-amps. Much has been said about the 'dangers of simulation.' "If you really want to know what's what, you must build a breadboard," so say some sages. To my mind, nothing could be further from the truth, or retrogressive. Modern integrated circuits rarely can be bread-boarded, for a variety of reasons which we need not discuss here; most savvy readers will be well aware of their limitations. By contrast, a few experiments using simulation can open one's eyes to numerous interesting subtleties of design which would absolutely go unnoticed in an attempt to 'build the real thing.' Clearly, the accuracy of the device models and numerical integrity are fundamental and crucial factors. The purpose of computing is to gain insight, not generate numbers. Few today would disagree about the potential of computers as levers for the mind. Like all power tools, however, they can be abused. For several years, I have been promoting the notion of Foundation Design. A circuit for study is first described in its simplest form, by using highly idealized device models; realism is then added systematically, layer by layer, using progressively more complete models. The purpose of Foundation Design is to eliminate enigma & maximize insight. I won't be able to fully explain or justify this philosophy of design in today's column, but hope to pick up that theme at a future time. In the few experiments that will be described here, we'll find that an extremely simple -- even somewhat naýve -- model for the OPA generates results that are, if not counterintuitive, at least unexpected. You are encouraged to repeat all these experiments in your own cyberlab; I'd be interested to hear of other insights you gain through their use. The results may vary a little, depending on whether you're using a basic SPICE derivative, running with loose tolerances, or an advanced circuit simulator. For these experiments, done quickly in odd moments during a busy visit to MIT, I used my faithful Tecra 740CDT laptop, running a UNIX O/S (Solaris), and employing ADICE (Analog Devices Integrated Circuit Emulator), a powerful ally that has been the beneficiary of a massive amount of feedback from the design community, over a period of some twenty years. ADICE features highly accurate BJT and MOS models, super-models for passive elements (including monolithic inductors) and an extensive repertoire of interactive analysis modes, supported by a powerful macro language, going well beyond Berkeley SPICE. So using this approach, let's now see how well some of my comments about the dangers lurking in an over-simplistic view of the OPA hold up to scrutiny. We can begin with some packaged results, obtained as follows. An ideal VCVS (that is, an 'e-element' in SPICE) having a flat gain of AO, is used to represent the 'ideal' OPA. With it, I made a unity-gain inverting amplifier, having a resistor connecting the source to the inverting node of the OPA and another resistor from that node to the output; the non-inverting node is grounded. That's all there is to the topology. I used resistors of 10 kW, a typical value in many less-demanding medium-frequency op-amp uses. But here's the critical bit: I modeled the distributed parasitics of the feedback resistor by breaking it up into N sections and placing N capacitors at every node along it, each connected to the perfect 'ground plane', that tantalizing node SPICE convention calls ý. (The very notion of such a 'Mecca,' a place of perfect rest, is seductive but dangerous; for the moment, however, we will conveniently pretend that there is such a zero-potential node). Incidentally, you can leave out the capacitor at the output of the VCVS: being an ideal E-generator, it won't make any difference to the response, in any modality. To be realistic, these capacitances should be quite small. If the total parasitic is 1 pF (it will be considerably lower in a practical PC board layout) we'll need to add ten little 100 fF caps when N = 10. The particular values of R and C don't affect the basic problem: they only determine the time-scaling. If you think the experiment makes more sense using a total capacitance of only, say, 0.1 pF, go ahead. Note that at this point, we're choosing to leave out the parasitics of the input resistor, though they'd be about the same in practice, and we can add them later. We can start by using a transient analysis, to provide a more obvious indication of whether the amplifier is stable or otherwise. I used a voltage source providing a short pulse, running from zero to 1 V and back to zero, with a rise-time of 10 ps, lasting a few nanoseconds: I started with a 1-ns pulse. Yes, that's pretty zippy, but remember, we're exploring the consequences of using an OPA that is supposed not to have any 'frequency limitations.' Now, we really don't need to ask whether this feedback system will be stable should this super-idealized infinite-bandwidth OPA also have infinite gain: we ought to be instinctively aware that it would scream like a banshee. (If that's not obvious to you, consider a career in logic design.) The question can be couched more precisely: What is the minimum value of the open-loop gain AO, let's call it ACRIT, at which the complete circuit becomes unstable? That is, the excitation pulse causes the system to enter a region of behavior in which there is an exponentially-varying oscillation. More strictly specified, ACRIT is that gain for which an oscillation is established by the pulse, but which neither increases nor decreases over time. Thus, ACRIT represents a knife-edge balance between a decay in the oscillations caused by the power losses in the resistors and an increase in their amplitude caused by the signal power provided by the OPA. So, what would you guess ACRIT is going to be? You would be correct in believing that the number of sections, N, into which the feedback resistor is split would have a bearing on the question. You might envisage, as I did, a table in which we list N in the left hand column and ACRIT on the right. The experimental results (which are not significantly less rigorous than by using a direct appeal to mathematics, by the way, since we're just letting SPICE intrinsically do the math for us, through the equations involving C and R) surprised me when I first did this, many years ago.
The chief thing to notice here is how very low the gain can be if this system is to be stable. Although we may argue about the realism of the modeling, it seems to be saying that if you really could find an OPA having infinite bandwidth, which the textbooks blithely assume to be the 'best case scenario,' it had better not have a gain of more than about fifteen in this mundane and commonplace application, which directly contradicts the other 'ideal' of 'infinite gain'! Stated in the most critical terms: infinite bandwidth and infinite gain are not ideals for an operational amplifier in any practical sense; they are, rather, extreme limit cases that serve solely to simplify the mathematics in textbook op-amp studies and thereby help to promote the underlying notions of an "operational amplifier" in the clearest possible terms. This simple experiment points out the inadvisability of actually introducing infinite bandwidth devices, even as a temporary model. Now, while a transient analysis is fine for looking at the general lay of the land, it doesn't afford the surgical precision that is available to us in this simulation study. In the first place, it takes considerable empirical juggling to steer ACRIT into the ballpark. Secondly, the amplitude of the envelope does some interesting things as the width of the test pulse is varied. This doesn't alter the criteria, but it leads to a final amplitude of oscillation which can be lower than that during the pulse period. Indeed, if the pulse width is adjusted to be equal to the discovered value of fCRIT, the oscillation amplitude after the pulse will drop to zero! (The second edge, having the same amplitude but opposite sign, exactly cancels the response caused by the first edge.) Thirdly, we'd like to invoke some macros that allow us to put the simulator into an automatic mode, and search for these special values, using very high values of N, without manual intervention. Finally, we'd like to improve the numerical precision of the simulation, looking for subtle trends. Accordingly, I replaced the pulse generator with a simple ac source, and swept frequency while adjusting the open-loop gain, AO, of the VCVS still representing the 'infinite-bandwidth' OPA. This of course leads to a magnitude response that (provided AO is in the right general range) will show a peak at some frequency. Here, my automatic algorithm was allowed to chase down ACRIT, by searching for that value of AO which generates the highest ac gain at resonance. It uses a kind of successive approximation, in which the frequency range also converges on fCRIT, leading to very accurate results, in a few seconds, for each value of N. There is a wonderful, almost fractal-like amount of detail near the resonance, and you need to be careful that your numerical techniques are accurate enough to fully explore this space. My voltage gains at resonance were between about 150 dB and 200 dB (10 billion), sometimes a little higher. The most definitive indication that you're hovering on the exact value of ACRIT is that the phase transition at fCRIT will suddenly flip in direction, within the span of a Hertz or two. Table II shows the values I obtained from this experiment.
The high values of N were achieved by simply using a cut-and-paste procedure in the schematic-capture domain. Here are a couple of curious observations: first, as far as I can see, the ACRIT for N = 3 really does has a value of 371/9, though I haven't done the analysis to find out why (any offers?) Second, there is a minimum frequency at a low value of N, and the reason for this was also not chased down in this micro-study. Finally, the ACRIT value does not decrease without limit but also reaches a minimum in the vicinity of N = 50. I'd be interested to hear from a reader who has the patience to explain these anomalies, using a formal analysis. Viewed as a two-port an exact analysis shows that the transfer function of a distributed RC line, driven from a zero-impedance source and open-circuited at its far end, can be expressed as: A(w) = sech (jwRC)0.5 When this is evaluated, it is found that the phase lag reaches 90ý at a frequency p/4CR and 180 ý at p/CR, and the attenuation increases progressively, being about 7.24 dB and 21.283 dB (a factor of 11.592) respectively. So why does the simulated circuit oscillate at some other frequency, and at a different ACRIT? This is because we also have a pure 10 kW resistor -- call it R1 -- at the input of our inverting amplifier shunting the output of the distributed RC line forming R2. (Of course, in practice, wed also have the CIN of the OPA to worry about.) Clearly, we could postulate a great many similar topologies, and spend all night looking at "what happens." For example, what happens when R1 also has distributed capacitance, just like the feedback resistor R2? It is found -- quite predictably -- that higher values of ACRIT are needed to start the song. Using an N = 100 simulation, we get ACRIT = 23.2014 and fCRIT = 311.14 MHz. By the way, give a passing thought at this juncture to another op-amp myth, the idea of the "virtual ground," beloved of textbooks. What is happening at this point in the circuit, also called the "summing node?" Well, if we are seeing gains of about 150 dB in simulation (give or take a few dB) at the op-amp's output, it follows that the input must be thrashing about at a level only some 20 to 30 dB lower, since VIN = VOUT/ACRIT. So at the input node, we will see very high gains, even at frequencies below fCRIT. This is not by any means an imaginary problem. The voltage swings at this "virtual ground" can be as large as the output voltage in certain real-world cases, as happens, for example, when using an OPA to provide the transresistance function in converting the current-mode out, IOUT, of a DAC to a voltage. At the leading edge of the current step, the input voltage changes by the full amount IOUTR2, only later settling to near-zero. Where is this all leading? Well, nowhere dramatic. The point is simply that ideas about modeling the OPA as having infinite gain and infinite bandwidth are not especially useful, since, when followed through, they lead to results which are manifestly not what are observed in practice. Of course, this is partly because the total CR product of practical resistors -- such as a 10kW 0.06-in. chip resistor -- mounted on a board will usually not be as high as 10 ns (though not a lot lower); partly because a lower ohmic value will invariably be used in a high-frequency application (if for no other reason that to lower the pole frequency caused by CIN); and partly because real OPAs have limited bandwidth. To take the numbers from that last result, you need a gain-bandwidth product of about 5 GHz, well above that afforded by even the fastest commercial op-amps. Since such are rare, such problem aren't often observed. This is a fair comment. It might be worth adding, in passing, that modern logarithmic amplifiers, such as Analog Devices' AD8307 and AD8309, actually do exhibit small-signal gain-bandwidth products of over 20,000 GHz. And that's not a typo! But these are never used in feedback modes. Integrator Inside So, is there a better way to model an "ideal OPA?" I think there is. As noted in an earlier column, the model that fits reality quite well is that of an integrator. This is only approximated for a practical OPA by using the transfer function: A(s) = AO/(1+sTO) The problem with this model, to my mind, is that it introduces two rather artificial parameters: the dc or zero-frequency (ZF) gain AO, and the open-loop corner frequency defined by wO = 1/TO. Neither of these are very important in practice: there will usually be an immeasurable impact on performance when replacing an OPA with an AO of, say, 100,000 with one having AO = 10,000,000, provided the gain-bandwidth product is the same for both OPAs. The artificiality of TO is quite apparent here: it would differ by a factor of 100 between these two cases, without any effect on the ac behavior! On the other hand, if we start out by modeling the open-loop transfer function using the integrator form: A(s) = 1/sT the time-constant T defines everything of importance about an ideal OPA. The gain is "infinite" at ZF, as required by the textbooks, the phase is a constant -90ý and the gain magnitude falls at a constant rate of 20 dB/decade and passes through unity at an angular frequency w1 = 1/T, or f1= 1/pT. The integrator model nicely captures the quintessentially benign nature of the OPA. Its therefore more useful to view an ideal OPA as a perfect integrator, having, not a characteristic gain at some low frequency (a figure which is all but meaningless, from an applications perspective) but rather, a characteristic frequency at which the magnitude of this gain is unity. This, of course, is only another way of saying that an op-amp has a certain gain-bandwidth product. The full import of this integrator view of the OPA is not widely appreciated, yet its the one thing that confers on the classical op-amp its great stability, and has ensured its ubiquity in thousands of applications. Try repeating the experiments with the lumped (N-section) approximations to the "slow resistors" (for both R1 and R2), only this time using an ideal behavioral model for an integrator: the VCVS is now described by VOUT = VIN/sT1, where T1 = 1/2pf1. If your simulator doesnt support such models, you can cobble together a pretty good integrator from a VCCS -- a transconductor, or G-element -- having a grounded capacitor at its output, followed by a buffer VCVS to provide a loadable output. Using N = 100, RC = 10 ns, I found that the system became unstable when the f1 exceeded 77.768975 MHz. This is about what one would expect, because we already have a constant 90ý phase lag in the OPA, so oscillation occurs when the feedback path introduces a further lag of 90ý. One of the lessons we're learning -- and later columns will make this point clearer -- is that the underlying concept of "the operational amplifier" as the optimum practical approach to the realization of, say, a wideband voltage-mode amplifier, or perhaps a current-to-voltage stage (the transresistance function) is under some pressure, as better alternatives are coming along. For many years, I have held to a minority view within Analog Devices as to the imminent demise of the venerable OPA. Certainly, it can be argued forcibly and passionately that great strides have been made in advancing the performance of classical op-amp topologies, using new technologies to push the speed frontiers. To the extent that there is a demand for such products (or, perhaps a little different, that a market can be created for them) companies like ours will go on stretching the envelope. But it need be hardly stated that a one-transistor low-noise amplifier performs remarkably well at 2.4 GHz, delivering very low noise, good power gain and intermodulation products that correspond to distortion unequaled by any high-frequency OPA. That is not to say that feedback techniques are inapplicable at such frequencies. Perhaps a future column could feature the remarkable ways in which such one-transistor stages can benefit by techniques that really did spring from the "op-amp paradigm." Before that, though, I'd like to work through a growing backlog of promises -- first showing how quite promising structures can lead to unexpectedly high distortion, then how some modern alternatives to the monolithic OPA are gradually broadening the scope of feedback amplifier techniques, and why these different topologies are so valuable in specialized domains, as well as in more everyday applications. Barrie Gilbert (IEEE Member 1962, Fellow, 1984), b. 1937, in Bournemouth, England, pursued an early interest in solid- state devices at Mullard Ltd, working on first-generation planar ICs. Emigrating to the US in 1964, he joined Tektronix, in Beaverton, OR, where he developed the first electronic knob-readout system, and other advances in instrumentation. Between 1970-1972 he was Group Leader at Plessey Research Laboratories. He later joined Analog Devices Inc. and was appointed ADI Fellow in 1979. He manages the development of high-performance analog ICs at the NW Labs in Beaverton. For work on merged logic he received the IEEE "Outstanding Achievement Award" (1970) and the IEEE Solid-State Circuits Council "Outstanding Development Award" (1986). He was Oregon Researcher of the Year in 1990, and received the Solid-State Circuits Award (1992) for "Contributions to Nonlinear Signal Processing". He has written extensively about analog design and has five times received ISSCC Outstanding Paper Award. He has been issued over 40 patents and holds an Honorary Doctorate from Oregon State University. Analog Main | Product of the Week | Columns | Editorial | Tech Notes
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