The PC card standard is an essential feature in today's mobile computing environment. It provides users with a pain-free dynamic expansion capability. Implementing the standard, however, is sometimes not so pain-free to designers. Interrupts and power management are two of the biggest stumbling blocks for OEMs in designing Cardbus systems.

Interrupts

Cardbus architecture was designed to be a PC card implementation of the PCI bus architecture and when a Cardbus card is configured it becomes a PCI application for all practical purposes. As a PCI application, it uses the PCI interrupts IntA and IntB for sockets 1 and 2 respectively. However, the specification requires that the sockets also support 16-bit, non-Cardbus PC cards. The latter use the ISA style IRQs for interrupts.

ISA interrupts are not covered in the PCI architecture and must be handled separately by an ISA-style Programmable Interrupt Controller (PIC.) The typical PIC uses 15 parallel inputs for IRQ1-IRQ15; however, the PCI bus does not define any additional signals for ISA interrupts and it is necessary to have sideband signals (additional signal lines) that must be run in addition to the specified PCI signals.

To minimize the number of sideband signals required to support ISA interrupts, a serial ISA interrupt scheme was developed, using only one pin, to provide for all 15 ISA interrupts and to even handle the PCI interrupts INTA and INTB as well as INTC and INTD. The interrupts are presented to the PIC in a synchronized serial data stream where the PIC must be able to extract the appropriate interrupts. There are serial interrupt controllers available for use in a PCI system that can handle serial inputs, like the Intel South Bridges. TI also has a deserializer chip which will decode the serial interrupt data and present it to a standard PIC in parallel form if the host does not use a South Bridge with this capability.

Power Management

Power Management is concerned with all classes of computers from servers and desktops to laptops and palmtops. For desktops it is directly associated with Microsoft's ON NOW Initiative which is targeted to have it appear that a PC is always turned on and ready to go even when the power switch is turned off. In reality, the system is not really off but in a power off standby mode that enables the system to come up to full operation seemingly instantaneously. For portables it is more of a battery-saving requirement than an instant-on effect. In both cases the Power management is achieved through ACPI (Advance Configuration Power Interface) which sets specific power states and how the system is expected to enter or return from these power states. The states for the PCI bus and devices that are attached to the PCI bus are defined in the PCI Power Management specification. Exactly how specific devices need to implement these power states is defined in the Device Class Specification. For example, the PCI PM specification establishes bus states B0-B3 and device states D0-D3. The Device Class Specification defines how specific devices such as a modem or LAN card must implement these device states. Some devices only need to support states D0 and D3 while others need to support to all four states.

The new Cardbus Device Power Management specification, recently approved by PCMCIA, defines a method of waking up a system from the lowest possible power states, D3hot and D3cold, while retaining wake-up context. The TI 14XX series of CardBus controllers will be fully compliant with this Device Class Power Management Specification.

To design a host platform that meets the ACPI specification it will be necessary to use Cardbus controllers that meet the PCI-PM and Device Class Specification themselves. Microsoft will set the date that host systems must be compliant to the Device Class Specification which, I would guess, will be January 1, 1999.

In another area of power management, the V_cc and V_pp power supplied to the PC card sockets is controlled by separate power switch modules, themselves controlled by the Cardbus controller and software. Some power switches are specifically designed to interface to the Cardbus controller through a serial interface to cut down on module pin count.

Other Design Challenges

In addition to interrupts and power management, there are several other issues in Cardbus design that can be stumbling blocks. One example is out-of-specification cards. Just picking a host controller that meets the PC Card 97 specification is not enough. There are many PC cards in the installed base that do not meet the specification and without making exceptions to how they are treated would not function properly. For example, there are some PC cards that only use one card-detect pin instead of the required two. If a host controller insisted on seeing both CD pins present before proceeding with card initialization, these cards would never be recognized. There are other cards out there that, for example, have timing problems. It is therefore very important to choose a host controller that has made compensations for these anomalies.

Another issue arises in dealing with pin-count limits. The popular 208-pin TQFP package used for Cardbus host controllers does not provide enough pins to bring out all the internal signals available for use by a host system. Not all of these signals are needed in every host system and having the capability to select which signals will be used as an I/O is vital. With some controllers, it is possible to select I/O pin definitions using a selection register programmed at boot time. This capability also helps with IRQ definitions when there is an interrupt conflict. IRQs can be switched around to available IRQ inputs without requiring any physical wiring changes.

This feature is also useful even when there are sufficient pins to bring out all of these signals, such as in a 256-pin BGA package. The ability to rearrange IRQ and GPIOs without re-laying out the mother board is a painless method to solve system conflicts.

Finally, it is essential to support Zoom Video in notebooks today. The Host designer must select which method to use to switch between multiple ZV sources. Low cost host controllers require the use of external buffers to multiplex between ZV sources while larger package sizes can provide internal buffering.