Introduction

Tight dynamic tolerances for supply voltages of next-generation microprocessors and DSPs at high-slew-rate transitions from sleep mode to full-power operation (and reverse) require fast-transient-response power supplies along with a special decoupling technique. The analysis and optimization of synchronous buck converters with hysteretic control at load current transients has been previously presented [1,2] This article presents a detailed optimization procedure for output filter selection to meet the load-current transient requirements at minimum cost and size. The electrolytic, OS-CON, POSCAP and ceramic type capacitors are compared to meet Intel's VRM 8.4 requirements [3]. These design examples outline the trade-offs between cost, size and efficiency of the power supply and help the user to choose the optimal solution for any particular application.

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