The power transistors act as variable resistors between the power supply and the load. As a result, the voltage dropped across those transistors multiplied by the current flowing through them is equal to power lost as heat. For example, consider a TEC element that can handle 1A of current with 2V across it. When operating from a 5-V power supply rail, the drop across the power transistor is 3V. Therefore, with 1A of current flowing, 3W of power is burned up. That power transistor will therefore likely need a heat sink, which can be a large and costly addition to the system. Even power op amps - which offer higher levels of integration - still need to get the heat out. Furthermore, the efficiency may be calculated by dividing the power used by the TEC by the total power supplied. In this example, the total power supplied is 5W while the power used by the TEC is only 2W, so the efficiency is 40 percent, which is the maximum that this system can achieve.

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Figure 2. Heat dissipation - linear vs. PWM.

PWM solutions offer a significant reduction in heat dissipation, as shown in Figure 2. Similar to a switch-mode power supply, the transistors in a PWM driver are driven into saturation, not the linear region, and are only on when they need to supply current to the load. The transistors are switched on and off at a high frequency, typically between 100kHz to 1MHz, with the "on-off" time creating a duty cycle proportional to the desired output voltage. As a result, they are very efficient - anywhere from 80 percent to 90 percent is easily attainable. The configuration shown in Figure 2 is called an H-bridge and allows current to flow through the load in either direction, for both heating and cooling, from a single power supply. For example, if you want current to flow from left to right through the TEC element, Q1 and Q4 would be switching while Q2 and Q3 remain off. It is this switching, however, that is the primary disadvantage of a PWM solution, specifically the noise generated from the switching itself. The switching waveform is filtered, typically with inductors and capacitors as shown in figure 1, to supply a DC output to the load. If the filter does not sufficiently attenuate the switching signal, however, ripple will be present on the TEC element, which may degrade its performance. Of greater significance is electromagnetic interference (EMI) from the high-frequency switching. With proper filtering of the outputs and decoupling on the power supply, these effects can be minimized.

Design considerations for an integrated PWM power driver

Since a PWM driver is more complicated than a linear driver, the system-level design involves a few additional considerations. First look at the output filter design.

Designing the output filter

Figure 3 shows a typical application schematic for the DRV591 PWM power driver with a second order low-pass filter. The device includes a fully integrated H-bridge and is capable of driving 3A out of each output, for both heating and cooling modes. As a result, one output filter for each output is required. However, if current is only needed in one direction, such as with a heating element, only one filter is required. The design guidelines discussed below will still apply.

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Figure 3. Typical application schematic for the DRV591 integrated PWM power driver.

The modulation scheme used in the DRV591 allows only one output to switch at a time - the other output is left on, connecting the load to ground through the output transistor. For example, if current is to flow from OUT+ to OUT-, the OUT+ output will be switching while the OUT- output is simply turned on. As a result, the design of the output filter is simplified into a pseudo-half-circuit analysis - design one side, then cut-and-paste. The resistance of the TEC element should not be halved, as the DRV591 modulation scheme does not drive it differentially.

The transfer function for an ideal second order low-pass filter is shown in Equation 1 below:

The cutoff frequency, _0, should be at least an order of magnitude lower than the switching frequency - the lower the cutoff frequency, the greater the attenuation, and therefore the better the performance. If the cutoff frequency is low enough relative to the switching frequency, the magnitude of the transfer function may be simplified for the high-frequency response, shown in Equation 2 below:

The DRV591 may be configured for either a 100kHz or 500kHz switching frequency - the application circuit in Figure 3 depicts the 500kHz mode. Using the filter components shown, a 10uH inductor and 10uF capacitor, the cutoff frequency is 15.9kHz, which yields nearly -60 dB of attenuation. The ripple is simply the power supply voltage multiplied by that attenuation factor. Using a 5-V power supply with the example filter, only 5mV of ripple will be present at the TEC element.

The quality factor, Q, of the filter should also be considered, though it is typically not much of an issue in the slow-moving temperature control systems - the frequency response of the control loop typically never exceeds a few kilohertz. The Q is equal to the magnitude of the transfer function at the cutoff frequency. If it is greater than 0.707, peaking will occur. In practice, the desired cutoff frequency is chosen first, then the Q is calculated or measured depending on the component values that are chosen and the value of the load resistance. The ideal Q may be calculated using Equation 3 below:

Typically, TEC elements have a very small resistance, usually around an ohm or two. This allows for greater flexibility in the selection of the filter components. For the example output filter, the Q is equal to 2, or 6 dB of peaking at the cutoff frequency.

All these calculations are based on an ideal filter. In practice, the cutoff frequency and Q of the filter will vary slightly due to series resistance primarily in the inductors, but also in the capacitors. The inductors selected should have as low a series resistance as possible, while ceramic capacitors should be used since they have a minimal series resistance.

Furthermore, the Q of the filter is particularly affected by the bridge-tied load configuration of the filter. As mentioned earlier, when one side of the H-bridge in the DRV591 is switching, the other side is grounded. Therefore, the load seen by the filter on the switching side of the H-bridge is the TEC element resistance, plus the parallel combination of the filter components connected between the load and the grounded side of the H-bridge. At the cutoff frequency, those filter components act like a tank circuit, whose effect is to make the Q of the circuit appear two or three times larger than calculated with the half-circuit approach. As mentioned earlier, the temperature control loop topologies that are commonly used roll off their response well below the cutoff frequency of the output filter, so this peaking is generally not a problem.

Minimizing EMI

Even though the performance of TEC elements is typically not affected by high-frequency noise, the system is very likely to be sensitive to the switching of the output transistors. For the DRV591, the noise at the fundamental switching frequency of 100kHz or 500kHz may not be as significant as the higher-order harmonics present in the square wave. To minimize electric field (E-field) radiation, the traces from the outputs through the filter should be kept as short as possible. The inductors should be placed as close to the IC as possible, and the capacitors should be placed as close to the inductors as possible. To minimize magnetic field (H-field) radiation, the loop length from the outputs to ground should be kept as short as possible.

Figure 4 shows the DRV591 evaluation module (EVM) layout, which provides a good starting point for a design. The EVM itself is designed for a balance between optimal performance and ease of use and rework, as users typically like to try out different filter components and topologies. For optimal EMI performance, the inductors should be placed closer to the outputs, and the capacitors closer to a shortened ground return path.

Figure 4. DRV591 evaluation module circuit board layout (top layer in red, bottom layer in green).

The problem with many power inductors is that at high frequencies, they may not look like inductors anymore due to their parasitic parallel capacitance. If the high-frequency components pose difficulties for the system, a small surface-mount ferrite bead may be placed in series with each output, as close to the output pins as possible, followed by the LC filter. The ferrite bead essentially acts like an inductor at high frequencies.

Power supply decoupling and grounding

If a power supply does not have enough storage capacitance, when the load demands a large amount of current, the voltage will droop. If the supply lacks high-frequency decoupling, noise may couple in to the supply itself. If the ground return path for the high-frequency switching currents is not well defined, the noise may couple into sensitive circuitry - which is always a tricky problem to eliminate. Since they perform a similar function to switching power supplies, PWM power driver solutions must confront these same issues.

The DRV591 EVM (Figure 4) includes a single 10uF ceramic bulk decoupling capacitor, C5. If the leads to the bench power supply are short and the required current is less than a couple of amps, this amount of decoupling is adequate. However, if the leads are long or if the current demands are high, an electrolytic capacitor from 22uF to 100uF should be added in parallel. The bulk decoupling should be placed relatively close to the driver to minimize trace inductance.

The DRV591 EVM also includes high-frequency decoupling on each set of power VDD pins (PVDD) as well as on the analog VDD pin (AVDD), shown as C1, C2, and C3. Any value from 0.01uF to 1uF is sufficient - the key is to place these capacitors as close to the pins as possible, since at higher frequencies the trace inductance becomes even more significant.

The grounding of these decoupling capacitors should fit with the overall grounding scheme. The analog ground used by the sensitive analog front-end, biasing, and oscillator circuits should be kept clear of any switching currents - any switching noise coupled into the analog circuitry may prevent proper operation. The power ground used by the output transistors should also steer the switching currents to avoid any ground loop troubles. As such, ground planes should not be used.

The DRV591 EVM layout shows the routing for the power ground and the analog ground. The ground connections for the decoupling capacitors and the filter capacitors all meet at the power ground pins (PGND), where the ground connections for the output transistors themselves are made. The traces themselves are large (at least 80 mils) to minimize inductance. The analog ground connection is made with small signal-sized traces (15 mils) to keep it relatively isolated from the power ground. The DRV591 makes use of the PowerPAD for improved thermal performance, which is discussed below. The PowerPAD is electrically connected to the substrate of the DRV591 silicon, which is connected to analog ground. As such, the PowerPAD should be soldered down to a thermal land tied to analog ground as shown in Figure 4. As mentioned earlier, the analog ground connection should be made with a single small trace, also shown in Figure 4.

Thermal performance

While the low on-resistance of the output transistors (approximately 65 milli-ohms per switch for the DRV591) allows for efficiencies greater than 90 percent, as the load current increases, the transistors heat up, and the on-resistance increases. At the maximum junction temperature of 125 degrees C, the total on-resistance of both switches in the DRV591 may be as large as 250 milliohms. At the 3A maximum output current, that amounts to 2.25W of heat that must be dissipated. The maximum amount of power that can be dissipated depends on the thermal impedance of the package and the ambient temperature, as shown in Equation 4 below:

The PowerPAD used in the DRV591 package improves the thermal performance by allowing the copper on the printed circuit board (PCB) to act as a heat sink. The PowerPAD should be soldered down to a small area of copper under the chip. Solid-connection 13 mil vias, not webbed or thermal relief type, should be placed under the PowerPAD down to a larger area of copper that will serve as the heat sink. (Additional PowerPAD layout information is available in the PowerPAD Thermally Enhanced Package application note at www.ti.com, literature number SLMA002).

At relatively low current levels (less than a couple of amps) or low ambient temperatures (25 degrees C or lower), only a small amount of copper is required, as shown in Figure 4. However, at higher current levels or higher ambient temperatures, the junction temperature may exceed the safe operating area with only that small copper area as a heat sink. For optimal thermal performance, an internal copper plane should be used. The plane should not be tied to ground except through the vias underneath the PowerPAD, which should make solid connections to the plane.

In conclusion, several key system-level design points must be considered when using a PWM power driver for a TEC element. The output filter must be properly designed to minimize ripple. The circuit board layout and component selection must minimize EMI. The power supply must have adequate bulk and high-frequency decoupling. The analog and power ground paths must be routed to minimize coupling or interference. Finally, the amount of heat to be dissipated must be determined for proper board layout.

Although the design is more challenging than a traditional linear solution, a PWM solution allows the designer to eliminate large heat sinks, reduce demands on the power supply, and decrease the total size of the temperature control solution.

References

Franco, Sergio. Design with Operational Amplifiers and Analog Integrated Circuits. New York: WCB McGraw-Hill, 1998.

Mynbaev, Djafar and Lowell Scheiner. Fiber Optic Communications Technology. Upper Saddle River: Prentice Hall, 2001.

Uemura, Kin-ichi. "Commercial Peltier Modules."CRC Handbook of Thermoelectrics. Ed. D.M. Rowe. Boca Raton: CRC Press, 1995.

DRV591 ý3A High-Efficiency PWM Power Driver Datasheet, Texas Instruments, Inc., November 2001, literature number SLOS389.

PowerPAD Thermally Enhanced Package Application Note, Texas Instruments, Inc., November 1997, literature number SLMA002.

Biography

Dave Skinner is responsible for product development and applications support for TEC driver products at Texas Instruments, Inc. in Dallas, Texas. He received BSEE and MSEE degrees from the Georgia Institute of Technology, where he specialized in analog integrated circuit design as a Texas Instruments Analog Fellow.

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