The Impact of Mismatched Resistors

I stated earlier that the resistors need to be matched to maintain balance in the amplifier. What happens if the resistors are not matched?

In the following discussion:

• R_F is the feedback resistor from the output to the input on either side of the op amp, i.e. R_F1 or R_F2.
• R_G is the resistance from the source to the input on either side of the op amp and includes the source resistance i.e. R_G1 + R_S, R_G1 + R_S1, or R_G2 + R_S2.

If the resistor ratios (R_F/R_G) are mismatched between the two sides of the op amp, the gain will vary proportionately to the mismatch, being a little higher than the average of the two sides. The internal common-mode feedback circuit will still maintain the output common-mode voltage equal to V_OCM. So, the output signals remain balanced, swinging plus and minus with reference to V_OCM.

Ratio matching errors in the external resistors will degrade the circuit’s ability to reject input common-mode noise. A 1% mismatch will result in about 46 dB input CMRR.

In similar manner, if the dc common-mode voltages at the input and output are different, matching errors will result in an offset in the differential output voltage. For example given: G » 1, 1% mismatch, ground referenced input signal, and V_OCM = 2.5 V, the output offset = 12 mV.

To further illustrate the impact of mismatched resistors, the node voltages of the two circuits shown above are analyzed with a 10% mismatch:

• Table 1 shows the effect of mismatched resistors in the single-ended source amplifier circuit shown in Figure 2: R_F1 = R_F2 = R_G2, but R_G1 + R_S = 0.9(R_G2), and V_OCM = +2.5V. Since the source’s common-mode voltage is different than the output common-mode voltage of the op amp, the mismatch causes an offset in the differential output (V_OD = -0.135) with zero input. The gain is 0.946 + 0.135 = 1.081.

• Table 2 shows the effect of mismatched resistors in the differential source amplifier circuit shown in Figure 3: R_F1 = R_F2 = R_G2 + R_S2, but R_G1 +R_S1 = 0.9(R_G2 +R_S2), common-mode voltage of the source = +2.5V, and V_OCM = +2.5V. With the common-mode voltage of the source equal to the output common-mode voltage of the amplifier, the mismatch does not cause an offset in the differential output (V_OD = 0.000) with zero input. The gain of the amplifier is 1.054.

V_OCM is used to set the op amp’s output to the common-mode voltage of the ADC’s input. Details are covered in the section about interfacing to the ADC.

At dc and lower frequencies, if the ratio R_F/R_G is equal between the two sides, the amplifier will be balanced. However if R_F1 ¹ R_F2 (or R_G1 ¹ R_G2), parasitic capacitance will unbalance

the op amp at higher frequencies. So for best operation, the feedback (and input) resistors should be equal.

Interfacing to the ADC

A primary function of the amplifier is to process the incoming signal so that it is at the correct bias point and amplitude to get optimum performance from the ADC. Obviously, it must have the bandwidth and ac performance to do this without compromising the signal. A simple fully-differential op amp to ADC interface is shown in Figure 4. The primary design issues in the interface are the load the amplifier sees, and setting the proper output common-mode voltage.

Figure 4 Fully-Differential Op Amp to ADC Interface

ADC Input

Figure 5 shows a functional diagram of a high-performance ADC input. During F 1,

the input capacitors are charged to the difference between the input and V_CM (this is the sampling period — typically 1/2 the clock period). During F 2, the charge is transferred to

the conversion circuitry, where it is converted into the digital output.

Figure 5 High Performance ADC Input

It is almost universally recommended to use a resistor and capacitor between the op amp’s output and the ADC’s input as shown in Figure 4.

This resistor-capacitor (RC) combination has multiple functions:

• The capacitor is a local charge reservoir for ADC
• The resistor isolates the amplifier from the ADC
• In conjunction, they form a low-pass noise filter

Charge Reservoir

During the sampling phase, current is required to charge the ADC’s input sampling capacitors. By placing external capacitors directly at the input pins, most of the current is drawn from them. They are seen as a very low impedance source. They can be thought of as serving much the same purpose as a power supply bypass capacitor: to supply transient current, with the amplifier then providing the bulk charge.

Typically, a low value capacitor in the range of 10pF to 100pF should provide the required transient charge reservoir.

Isolation

All this capacitance and the switched capacitor input nature of the ADC is one of the worst loading scenarios that a high-speed amplifier will encounter. The resistor provides a simple means of isolating the associated phase shift from the feedback network and maintaining the phase margin of the amplifier.

Typically, a low value resistor in the range of 10ohms to 100ohms should provide the required isolation.

Noise Filter

Together, the R and C form a real pole in the s-plane located at the frequency .

Placing this pole at about 10x the highest frequency of interest insures it has no impact on the signal.

Since the resistor is typically a small value, it is very bad practice to place the pole at (or very near) frequencies of interest. At the pole frequency, the amplifiers sees a load whose magnitude is . If R is only 10 ohms or so, the amplifier is very heavily loaded above the pole frequency, and will generate excessive distortion.

Amplifier Loading

With the RC combination at the input of the ADC, the amplifier sees a load that can be modeled as show in Figure 6. Sometimes the input impedance of the ADC is such that R_IN >> R and C_IN << C. In such cases they can be ignored, and the input model is simply the external RC combination. For proper performance analysis, the amplifier should be tested with this load.

The output impedance of the op amp is important in considering the effect of output loading. Due to negative feedback, the output impedance of the op amp is very low over most of its bandwidth. The closed loop output impedance, , where Z_O is the closed loop output impedance, z_O is the open loop output impedance, a(f) is the frequency dependent open loop gain of the amplifier, and β is the feedback factor . At low frequencies the product a(f)β is very large and the output impedance ® 0. The open loop gain falls in proportion to the frequency. It is important therefore to use an amplifier at frequencies where a(f)β is very large to minimize the effect of the voltage divider between the output impedance and the load.

Figure 6 ADC Input Load Model

ADC Reference and Input Common-Mode Voltages

Figure 7 shows the internal reference circuit that is published in the ADS809 data sheet. The reference voltages, REFT and REFB, determine the input voltage range of the converter. The voltage CM is at the midpoint between REFT and REFB. The input signal to the ADC must swing symmetrically about CM to utilize the full dynamic range of the converter. This means the output common-mode voltage of the amplifier must match this voltage.

Figure 7 Internal Reference Circuit of the ADS809 and Recommended Bypass Scheme

The V_OCM input on the THS45xx is provided specifically for this purpose. Internal circuitry forces the output common-mode voltage to equal the voltage applied to V_OCM. Thus, V_OUT+ and V_OUT- swing symmetrically about V_OCM. In many cases, all that is required is to tie CM to V_OCM with bypass capacitor(s) to ground (typically 0.1ýF to 10ýF).

Figure 8 shows a simplified schematic of the V_OCM input on the THS45xx. With V_OCM unconnected, the resistor divider sets the voltage halfway between the power supply voltages. The equation shows how to calculate the current required from an external source to overdrive this voltage. Internal circuitry is used to cancel the bias current (I_EA) drawn by the V_OCM error amplifier. It is easy to see that if the desired V_OCM is halfway between the power supply voltages (as in a single +5V supply application) no external current is required. On the other hand, suppose the amplifier is being powered from ± 5V and the desired V_OCM is +2.5V, the external source will need to supply 100 microA. Depending on the CM output drive from the ADC, a buffer may be required to supply this current.

Figure 8 V_OCM

All high-performance ADCs using differential inputs that I have seen have an output for setting the common-mode voltage of the drive circuit. Different manufacturers use different names for it. I have seen CM, REF, V_REF, V_CM, and V_OCM. Whatever it is called, the important things to remember are:

• Make sure it has enough output drive current if V_OCM is not at mid-rail
• Use by-pass capacitors to reduce common-mode noise

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