Fully-Differential Amplifier Design in High-Speed Data Acquisition Systems
by James Karki, Member, Group Technical Staff, High Performance Linear, Texas Instruments

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Signal integrity is paramount in high-speed data acquisition systems in applications such as communications, imaging, instrumentation, video and multimedia, and many engineers are finding the solution to be fully-differential signal processing. The advantages are inherent in the architecture:

• External common-mode noise sources (from the power supply and other circuitry) are rejected by the differential nature of the architecture.
• Even order harmonics tend to cancel.
• The required voltage swing for each differential output is only 1/2 that of its single ended counter-part, thus reducing distortion and easing power supply requirements.

All high-performance, high-speed data converters are now using differential inputs to enhance performance. Most often, amplification, impedance matching, filtering, and level shifting are required in front of the ADC. Fully-differential op amps are not only ideal for these functions, but also greatly simplify the design task.

Fully-differential signal processing represents a paradigm shift in the design process, which has some nuances that are not obvious. The purpose of this article is to highlight these design issues, and show how to deal with them.

TI’s THS45xx family of fully-differential op amps are designed with a combination of high bandwidth, low distortion, and low noise that makes them suitable for interfacing to 12-bit and 14-bit high-speed data converters.

Introduction

The data acquisition problem can be broken into four parts as depicted in Figure 1: the overall system requirements, the source interface, the amplifier’s role or function, and the ADC interface. The design strategy is to design the interfaces between the signal source and the ADC with the proper amplifier function to realize the system requirements.

Figure 1 The Data Acquisition Problem

Source to Amplifier Interface

There are two general categories of sources that need to be considered: single-ended and differential. Single-ended sources are most often referenced to ground, whereas differential sources are not. The following discussion considers the design issues when using a fully-differential op amp in both situations.

Typically in amplifier design, the input impedance of the amplifier is of prime concern, and this holds true for fully-differential op amps.

Interfacing to a Single-Ended Ground Referenced Source

If the source is single-ended and referenced to ground, a fully-differential op amp can be used to convert the signal to differential (and level shift) as shown in Figure 2. V_S is the input source with associated output impedance R_S.

Figure 2 Single Ended Source

Balance and Gain

It is important to maintain balance in the amplifier by setting R_F1 = R_F2 and R_G1 + R_S = R_G2. The effect of mismatching the resistors is discussed below.

The differential output voltage is given by: , where and .

If the resistor ratios are matched, the single-ended input to differential output gain is given by: . Note the source resistance affects the gain of the amplifier.

The input impedance equals , where K is the gain of the amplifier.

At high gain this converges to 2 x R_G1.

Input Common Mode Voltage

It is important to avoid violating the input common-mode voltage range (V_ICR) of the op amp. Assuming the op amp is in linear operation the voltage across the input pins is only a few millivolts at most. So finding the voltage at one input pin will determine the input common-mode voltage range the op amp will see. It is easiest in Figure 2 to find the voltage at the negative input pin of the op amp. It is given by: . To determine the required V_ICR

of the op amp, the voltage at the negative input is evaluated at the extremes of V_OUT+.

The input common-mode voltage range is more likely to present a problem when operating the amplifier with single-supply voltages and higher gains. For instance take two amplifiers, each configured as shown in Figure 2, operating from +5V and ground with V_OCM = +2.5V (details on V_OCM are covered in the section about interfacing to the ADC) and the differential output voltage, V_OD = 2 Vp-p. One amplifier has a gain of 1 and the other has a gain of 10.

• With gain = 1, the required voltage range is 1V to 1.5V — fairly relaxed limits.
• With gain = 10, the required voltage range is 0.18V to 0.27V. The amplifier’s V_ICR must go very near the negative supply voltage rail.

For this type of application, the IC designer must pay special attention to ensure the op amp’s V_ICR includes the negative rail. Take, for example, the THS4501; special level shifting circuitry is used so that V_ICR can actually go below the negative rail.

Interfacing to a Differential Source

A differential input source is depicted in Figure 3. V_S is the differential input source with associated output impedance R_S1 and R_S2.

Figure 3 Differential Source

Balance and Gain

Again, it is important to maintain balance in the amplifier by setting R_F1 = R_F2 and R_G1 = R_G2. The input source must also be balanced with R_S1 = R_S2. The effect of mismatching the resistors is discussed below.

The differential output voltage is given by:

,

where and .

If the resistor ratios are matched, the differential input to differential output gain is given by . Note the source resistance is included in the gain equation again. The input impedance is equal to R_G1 + R_G2.

Input Common Mode Voltage

Again, it is important to avoid violating the input common-mode voltage range (V_ICR) of the op amp. The analysis is not quite as easy as with a single-ended input, but still you can analyze one input pin and assume the other sees the same voltage due to amplifier action.

Treating the positive input as a summing node, the voltage is given by: .

To determine the required V_ICR of the op amp, the voltage at the positive input is evaluated at the extremes of V_OUT- and V_S+.

The input common-mode voltage range is more likely to present a problem when the source has a high or low common-mode voltage and the amplifier has high gain.

I recently worked with interfacing a CCD sensor to an ADC. The CCD sensor has 500mV differential output centered around +9V. The amplifier is in a gain of 2 with +9V and ground for power, and V_OCM = +2.5V (details on V_OCM are covered in the section about interfacing to the ADC). So, the amplifier’s output is 1Vp-p centered around +2.5V. The voltage range seen at the positive input to the op amp is: +7.17V to +7.33V. This is toward the positive rail, but far enough from it not to present a problem. If the situation is changed, where the sensor’s output is lower and a high gain is required, the voltage range would approach the positive rail and the op amp may not work properly.

If the common-mode voltage of the source can be adjusted, centering it within the amplifier’s V_ICR provides for optimum performance.