TriQuint Semiconductor, Inc. has released the first products of itıs new family of 2.488 Gb/s OC-48/STM-16 integrated circuits. These standard products complement the company's leadership products in the OC-48 ASIC market.

The TQ8213 multiplexer incorporates the clock synthesis PLL function in addition to a 10-75mA-laser driver (or a 0.5V to 3.75V electro-optical modulator driver) in a single monolithic device. The TQ8213 provides the industryıs lowest jitter generation while simultaneously providing excellent jitter-transfer characteristics. This provides the highest available component margin to meet the SONET system jitter generation specification of 4pS max, and jitter transfer specification of below 0.1 dB peaking and 2 MHz bandwidth. Unique to the industry, TriQuintıs on-chip incorporation of an opto-electronic driver allows the TQ8213 to directly drive a laser diode or optical modulator without the need for additional customer supplied driver electronics. Both of these features allow significant system cost and complexity reductions.

The TQ8223 demultiplexer incorporates a PLL-based clock and data recovery function in addition to byte and word framing. The integrated clock and data recovery function provides reduced optical module cost while improving system level jitter performance. The high speed serial inputs will accept differential or single ended, PECL or analog inputs with 40 mV sensitivity. The decision threshold can be varied in both phase (time) and level (voltage) which permits the designer to optimize the receiver performance when faced with degraded input signals.

Both products incorporate a 32 bit wide TTL data bus with optional parity checking and will operate from a single +5V supply. The laser driver power supply is brought out on a separate pin to allow higher voltages for driving higher laser currents. Both products are fully compliant with ANSI, Bellcore, and ITU jitter requirements.

PERFORMANCE
Andy Turudic, Director of Strategic Marketing for Telecom Products said, "We've combined our mixed signal process technology with our differential design topology and sprinkled in a little architectural innovation to produce an industry first - femtosecond level electrical jitter generation combined with a compliant jitter transfer curve. With a 38.88 MHz reference clock, we are typically seeing 800 fS RMS jitter generation on the bench, while competitive products are specified only to the 4 pS (4,000 fS) jitter spec with a 155.52 MHz reference. This device margin significantly simplifies the design process. The designer can choose to reduce the system complexity and cost, or to improve repeater-to-repeater distance or link reliability. These devices, with their clock bypass feature, also provide intriguing possibilities for enabling FPGA's to reach into the Gb/s realm of serial or bus communications with a simple 32 bit wide interface. We've also incorporated sync functions that allow multiple devices to operate in parallel."

Future additions to the high performance family of telecom devices will include 16 and 8 bit wide PECL data busses, transceivers, 3.3V operation, and OC-192 (10 Gb/s) products.

Driving the achieved jitter numbers down to one quarter of the competition will make TriQuint beloved by systems engineers. Because the complexity of repeaters is already a designed, done-deal, most manufacturers will use the specification improvement to sell the claim that their repeaters can be further apart -- which they will be able to be. Adding a laser driver to the multiplexer will increase the acceptance of the part quite dramatically and available sync functionality adds some intriguing possibilities for future directions.

I'm sure TriQuint know that it needs to get the parts in production at 3.3 V as quickly as possible otherwise it might lose a significant proportion of the next generation market -- which it should in fact have won because of performance. Every time you (that's me) think that GaAs has finally run out of steam the vendors come out with a performance characteristic that gives it longer life. If the company can achieve the same performance ratio of jitter improvement at 10 Gbit/s then it will have the market to itself for some time. Apart from the jitter specifications I love the decision-threshold choice of either phase or level.