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Philips TDA9819/9829T/8960 DTV chipset

For data sheet click here

Philips Semiconductors continues its leadership in the TV systems with the announcement of a complete VSB tuner front end and channel decoder chipset for Digital TV

The manufacturer says . . .
EDTN's Paul McGoldrick says . . .

Philips Semiconductors has announced a complete chipset design for handling Vestigial Side Band (VSB) signals for Digital TV. This can take the terrestrial or cable signals and process them to the stage of a digital MPEG transport stream that can then be used in a personal computer, TV or Set Top Box. The two key chips are the VSB IF downconverter, which is either a TDA9829T or a TDA9819, and the TDA8960 VSB integrated demodulator and decoder.

'Our design provides a complete system solution to handle the initial part of VSB Digital TV signals,' explained Guenther Dengel, Philips Semiconductors' managing director for Consumer Integrated Circuits. 'This is generating a lot of interest, particularly from major computer manufacturers who are keen to integrate Digital TV into PCs. Naturally, we can also provide ICs to handle the MPEG stream thereafter for whatever application they may be working on. For PC applications, the MPEG transport stream can be fed into a graphics controller, TriMedia processor or PCI bus master IC.

Although initially targeted at the USA where this chipset design is fully compliant with the recently announced ATSC (Advanced Television Systems Committee) formats for Digital TV, Philips Semiconductors will be developing solutions for other parts of the world as the relevant standards are determined using the experience gained from pioneering the US marketplace.

TDA9819 and TDA9829T downconverters

These downconverters work on IF frequencies from 38.9 MHz to 45.75 MHz, to handle the terrestrial applications of the standard 6 MHz VHF/UHF terrestrial TV channels (TV channels 2 to 69 in the US) and similarly, for cable applications, the standard 6 MHz VHF/UHF cable TV channels. They provide true synchronous demodulation with active carrier regeneration, very linear demodulation, good intermodulation figures, reduced harmonics and excellent pulse response.

They are both based on a design consisting of three AC-coupled, differentiator amplifier stages, with each differential stage comprising a feedback network controlled by emitter degeneration to control the IF gain. The TDA9819 provides the additional feature of being able to accept both digital video and analog TV input.

TDA8960

The TDA8960 is an 8-VSB demodulator and decoder that handles the channel decoding prior to the signals going to the source decoder for MPEG decoding. It functions as a one chip ATSC-compliant demodulator and concatenated trellis (Viterbi)/Reed-Solomon decoder with de-interleaver and descrambler. Adaptive equalisation is performed based on the use of the ATSC field sync (trained equalisation) and/or the 8-VSB data itself (blind equalisation). It is also one of the first such devices to have a Forward Error Corrector (FEC) integrated onto the IC and to generate the Nyquist slope digitally rather than via the Surface Acoustic Wave (SAW) filter.

The IC requires a single 'low IF' passband signal centred at half the 8-VSB symbol rate of 5.38 MHz as an input and provides 8-bit wide MPEG2 transport packet data at the output. It requires a single clock frequency which is equal to twice the 8-VSB symbol rate. Most of the loop components needed to recover the data from the received symbols are internal. The only required external loop components are a low-speed DAC (Digital to Analog Converter) and VCXO (Voltage Controlled Crystal Oscillator) for the symbol timing recovery and an op amp integrator for the AGC (Automatic Gain Control). Loop parameters of the clock and carrier recovery can be controlled by I2C.

When you tally the costs of adding a tuner, MPEG-2 stages and 8-channel recognition and changeovercircuitry, my estimate is that Philips have helped achieve the DTV necessaries for what will be little more than $50 above the present receiver costs. This leaves larger and/or flatter and 16:9 aspect ratios for the displays as the variables and those are in the works. This is the first full-viable chip set for the 8-VSB transmission standard proposed by the ATSC and adopted by the FCC.

The complete front end of a digital-ready receiver for terrestrial or cable use would consist of a UHF/VHF tuner, the TDA9829T, an ADC (driven by a VCXO and locked by the output of a DAC hanging on the TDA8960 VSB demodulator. AGC would need to be provided and the whole circuit could be controlled from a I2C bus. To add the ability to continue to receive analog broadcasts the IF downconverter could be changed out to the multi-standard PLL TDA9819. The data sheet numbers for the IFs are extremely good and with a tuner that has a noise figure better than 7 dB, the system should be fully able to resolve the future terrestrial broadcasts (starting in the Fall of 1998 from the top markets.) Both these ICs are also fully DVB-compliant.

Because of the variability in the possible standards of DTV transmission (from 480P to HDTV) the use of the digitally-generated Nyquist slope overcomes the problems of multiple filters being required and leaving the output as a full 19.28 Mbps data packet allows for the future smarts of the different standards to be part of the MPEG-2 handling. The input of the TDA8960 (again, controlled by an I2C bus) provides fine AGC, carrier recovery, half-Nyquist filtering, symbol timing recovery and adaptive equalization, as well as the DAC interface to lock the external VCXO. The data pass the Viterbi decoder, de-interleaver, Reed-Solomon decoder, de-randomizer and FIFO.

For data sheets use the 'Search' facility for each part number in the 'Products & Data' database of Philips Semiconductors.

The TDA9819 is in a 32-pin SDIP package, priced at $2.82 in 10,000 lots and is available now; the TDA9829T will be in a 20-pin SO package and will be priced at $2.05 in 10,000 lots and will be available early 1998. The TDA8960 will also be available in early 1998 in a 64-pin QFP and will be priced at about $18 in 100,000 lots.


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