Analog Avenue

Product Review

Archive | Feedback

Fujitsu Announces World's Fastest CMOS DAC

The manufacturer says . . .

ChipCenter's Paul O'Shea says . . .

Fujitsu Microelectronics America, Inc. (FMA) announced the MB86064 Dual 14-bit 800 Msamples/s D/A converter (DAC). This is the first Application Specific Standard Product (ASSP) based on its next-generation DAC technology. Until now Fujitsu has been providing customers with early access to the next-generation DAC technology through mixed-signal ASIC (MS-ASIC) solutions. The move to provide an ASSP solution will enable applications where a custom approach is neither required nor justified. "This ASSP is integral to the roll-out of our latest DAC technology, opening up more opportunities and markets. The price/performance point achieved enables the cost-effective realization of high direct-IF multi-carrier systems for GSM, W-CDMA, and UMTS," said Keith Horn, FMA's vice president of marketing. As well as radically improved performance from innovative circuit designs, the product boasts a host of features ranging from the on-chip vector memories (which enhance system integration and test) to next-generation Segment Shuffling (which further improves dynamic performance). The vector memories enable waveforms to be downloaded and executed on-chip. For device test and evaluation, this alleviates the need for a high-speed data generator, while in a final system application they are ideal for implementing tests on the subsequent analog signal chain. Analog performance at high output frequencies is enhanced by novel current switch and switch-driver designs that provide constant data-independent switching delay, reducing jitter and distortion. The leap in performance provided by this D/A converter will be instrumental in enabling new architectures to reduce the costs of existing cellular infrastructure systems while simultaneously addressing future needs. In four-carrier W-CDMA applications, an ACPR of 70 dBc can be achieved with direct-IF generation at 300 MHz, with even higher performance at lower output frequencies. "This development reflects our position as the leader in high-speed DAC technology," emphasized Ian Dedic, chief engineer at Fujitsu Microelectronics' Mixed-Signal Division. "We have already been granted eight U.S. patents protecting the jitter reduction techniques and other innovations used in the MB86064, and have further patent applications pending both in the U.S. and other countries." Direct-IF architectures can now demonstrate cost-competitiveness to more traditional direct-modulation architectures, while avoiding their inherent drawbacks. Bandwidths up to 100 MHz can now be generated directly at these high IFs, sufficient to implement the entire UMTS band with digital pre-distortion. The Segment Shuffling is a major enhancement over techniques introduced in the MB86060 and MB86061 D/A converter ASSPs. This improves performance to the level sought after for next-generation systems and high direct-IF architectures by moving distortion products out-of-band and reducing device-to-device variation. "The MB86064 provides an unrivalled solution to the problem of generating wider transmit bandwidths in cellular base stations," highlighted Stephanos Thomopoulos, FMA's marketing manager for wireless products. Implemented in Fujitsu's advanced mixed-signal CS80A 0.18 µm CMOS process, the dual D/A converter core, combined with LVDS data inputs and a versatile serial control port, provides a complete high-performance D/A converter solution. Generating and driving the data for such a D/A converter has traditionally been restricted to expensive ECL-based technology. However, the provision of an LVDS interface, combined with the advance in data-generating capabilities of ASSPs, ASICs, and FPGAs, enables cost-effective, realizable solutions. In particular, clock-to-data timing across the data interface can be guaranteed by using FPGAs with phase-locked loop (PLL) or delay-locked loop (DLL) clock generators and external reference clock loop-back. The provision of a dual D/A converter has particular benefit to cellular infrastructure applications, for example, either can transmit with diversity or combined dual-transmit configurations. Other application areas are expected to include test equipment and video/display systems. The MB86064 is housed in Fujitsu's enhanced fine-pitch ball-grid array (EFBGA) package. The EFBGA range has been developed specifically to meet the needs of high-performance mixed-signal devices. Benefits include optimized signal routing within the package, easier PCB tracking, and excellent thermal properties, assisted by a thermal ball array directly under the device. Using the 120-ball variant, the package measures 12 mm × 12 mm. Fujitsu Microelectronics America, Inc. Tel: 800-866-8608 Web site: www.fma.fujitsu.com/dac

The main difference between this newest product (the MB86064) and the previous versions from the company is the sampling rate. Other versions have been available in an ASIC core for 400 Msamples/s, which is, as you know, pretty fast. Fujitsu offered the ASIC core for custom solutions for customers designing base stations. Fujitsu has offered custom D/A converters for base-station manufacturers for many years, and the company thinks that this core is stable and mature. So, the company decided to produce the D/A converter as an application specific standard product (ASSP) instead of a specialized ASIC. The change to an ASSP means that Fujitsu is going after the next generation of base stations for W-CDMA and UMTS. Fujitsu looked at the market and what the next-generation base stations would need, and considered the limitations of the existing products. When it came to running a W-CDMA, they observed that companies ideally wanted a four-carrier system running at 100 MHz, 200 MHz, and possibly even 300 MHz. Although Fujitsu's 800 Msamples/s D/A converter is a little more expensive than the slower chips on the market, it eliminates components in the system, and that makes it less costly overall. For example, in a typical system if you go from a baseband directly to a D/A converter, you get an IF signal of few MHz. Subsequently, you must upconvert to a couple hundred MHz, and then go to RF. However, with a D/A converter such as the MB86064, you exit with a 200–250 MHz signal, and that enables you to convert directly into RF. This approach allows you to do away with the typical upconverter stage and eliminate mixers, PLLs, and VCOs. I found the current switch and switch driver designs very interesting because they provide constant data-independent switching delay, which reduces jitter and distortion. How does that work? The idea behind this novel design is to give constant data out, thus reducing delays from one data point to another. It is driven on every half clock cycle, or more precisely, the D/A converter cores are clocked on the rising and falling edge of the input clock. It's like you have two different D/A converters compared to similar designs that typically clock the D/A converter on either the rising or falling edge, not both. That eliminates the delay that most D/A converters have, and provides a more stable signal. Customer development kits and sample devices are available today. Mass production is scheduled for 3Q CY2003. For 10k units, the price is $80. Datasheets: MB86064 MB86061 (You will need to fill out a form and send an e-mail.)

Analog Main | Product of the Week | Columns | Editorial | Tech Notes

 

		Click here to get your listing up.