If it wasn't for that pesky real-world, analog circuits would have disappeared long ago, but such entities as temperature, sound, pressure, and vibration (to name a very, very few) just won't let go. Nevertheless, the electronic-industry trends continue to pursue the totally digital system. Analog circuits will never be annihilated but -- with a certain degree of indifference -- the digital circuit designers continue to push their domain of choice into the analog front-end portion of the circuit.

A digital strategy eliminates a lot of design problems; for instance, the ratio of size versus function is shrinking at a much faster rate than mature analog systems. Digital linearizing algorithms easily replace complex analog circuit solutions. The noise margins of a digital gate are much larger than the noise margins of an operational amplifier. Of the many challenges that the analog design presents to the engineer, noise reduction consumes a large portion of the design time. The analog designer is often put to the task of squeezing the last bit of precision out of the circuit by reducing the noise. This is an ongoing battle as the industry standards dictate higher and higher accuracy.

Since the real world doesn't go away, the noise that goes along with it is also here to stay.

As the digital portion of the system circuit gets closer and closer to the analog front end, it is also closer to the noise. Engineers who haven't gained a respect for this age-old analog issue are usually stunned to find out that the noise in their system prevents them from obtaining accurate, repeatable results. The new message to the digital system designer is "Welcome to the analog domain."

Analog: Alive and Well

As one would suspect, the barrier between the analog and digital worlds is inside the ADC and DAC. With 8- to 12-bit converters noise is classically described in terms such as SNR (Signal-to-Noise Ratio), THD (Total Harmonic Distortion), SFDR (Spurious-Free Dynamic Range), and quantization noise. These terms are not foreign to the analog designer, but are typically not used or discussed in the low-frequency band application areas.

"Effective number of bits" or "effective resolution" are terms that came about with the arrival of the >16-bit ADCs. These high-resolution converters were capable of providing more bits than could accurately be digitized in one conversion. With careful layout practices and circuit design, this degree of uncertainty was and still is predominately a consequence of device noise. Multiple conversions, along with mathematical manipulation, reliably produce a higher effective resolution at the expense of reduced application circuit speed. The addition of a DSP or ýC-type device is required in the application to accomplish this type of performance improvement.

Most of the converters that digitize the analog signal up to 16-bits are SAR (Successive Approximation Register) converters. Of course, this excludes the high-speed devices such as Pipeline or Flash converters. The delta-sigma converter is the first ADC that performs the on-chip mathematical manipulations mentioned above. This type of converter relieves the board level designer of intensive DSP software design work by incorporating the over-sampling and digital-filtering functions inside the converter chip. With this type of converter, the number of bits has increased and now the sources of noise have moved from being dominated by quantization noise to being over-run by transistor and resistor noise. This sounds a lot like an analog problem!

Does Mixed Signal Compete?

You might ask, "How close is the digital circuitry to the noise floor?" It used to be, with the converters that had 8-, 12-, 14-, or even 16-bit resolutions, that the signal still required an analog pre-gain stage before it reached the ADC. Now there are ADCs on the market that claim 20-, 22- and 24-bit resolution. The graph below brings home the fact that the digital world has finally joined the analog when it comes to dealing with separating the signal from the noise.

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In this graph, the noise is referred to the input of every device. Although it is not specified, each curve is representative of the devices that are high-precision state-of-the-art, single-supply parts. This graph is unusual in that it shows the ýVp-p noise in terms of bandwidths. In other words, the measured noise (referred to input), in a 100 Hz bandwidth of a good single-supply, precision instrumentation amplifier is about 20 ýVp-p.

The amount of noise that the precision delta-sigma converter adds to the same signal at a sampling rate of 100 Hz (G=1) is approximately 10 ýVp-p. And on the lower end, measured noise (referred to input) of a good single-supply, precision instrumentation amplifier is about 800 nVp-p. In the case of the ADC, the bandwidth-limiting is accomplished by setting the output data rate of the converter to the preferred frequency.

In the case of the analog operational and instrumentation amplifiers the bandwidth would be limited by a low-pass filter in a real application. Prior to the introduction of high-resolution delta-sigma ADCs, this chart was exclusively populated with analog parts. Now the mixed-signal converters are playing on the same field and the concept of noise is undergoing a rediscovery phase. The first time around the analog designers grappled with tackling their noise problems. This time around the digital designers are confronted with the actualities of the terms: r.m.s. noise and peak-to-peak noise.

23-bits r.m.s. of Effective Resolution Defined

The high-resolution delta-sigma converters advertise effective resolutions up to 23-bits r.m.s. in a 10 Vp-p full-scale-range (FSR) at a 60-Hz data rate; this translates to 6.4 ýVp-p input noise, a performance that far exceeds other ADC topologies, such as the SAR designs.

Although the delta-sigma converter absorbs the computational overhead of the digital filtering function, there is a variation from one digital output code to another. The accuracy of the digital output code is affected by the cumulative noise at the time of the conversion. This noise can be generated by the rest of the circuit and injected into the ADC through the input pins, reference pin, or power supply connections. But the bottom line in the converter's performance is the noise that is generated by the device itself. This cumulative noise can be represented in Vrms or Vp-p units The r.m.s. noise is defined as one statistical standard deviation (Vrms) given multiple conversions. A sample size of 256 is a reasonable sample size to determine a reliable r.m.s. value.

Noise is a random event and any amplitude is theoretically possible. However, the digital output value over time can be reliably predicted with the Gaussian distribution statistical model. When the r.m.s. value is multiplied by a constant, a peak-to-peak equivalent can be computed. In the analog world this constant is the crest factor multiplied by 2. The probability of exceeding a value above the r.m.s. (one standard deviation) can be anticipated with this calculation. For instance, with an effective resolution of 1 Vrms, the probability of a sample exceeding ý2.625 V (2 x crest factor of 5.25) from the average output is 1%. If a 2 x crest factor of 6.6 is applied, the probability of the output exceeding ý3.30 V of the average output is 0.1%.

Even though the industry standard 2 x crest factor is equal to 6.6, this constant can be chosen to meet the application need. This 2 x crest factor is used to define the term "Noise Free Bits" in a digital system. If you calculate this constant into bits you will find that:

            Noise Free Bits = Effective bits r.m.s. - 2.723 bits.

The Paradigm Shifts but the Problem Persists

So the real-world is here to stay. Digital solutions have eliminated a great deal of design headaches, but when it comes to the analog interface the designer is always challenged.

Noise-reduction techniques are a pre-requisite if you want to design high-precision data acquisition systems. The analog engineer has always worked on improving the SNR and reducing the Vp-p noise levels. Luckily, the digital engineer can now join the party.