Signal integrity problems are hard to solve unless you have the right tools. If there is an ADC in the signal path, at least three points of view should taken when assessing the circuit's performance. All three of these evaluation approaches take a strong look at the ADC, as well as its interaction with other portions of the circuit. During the circuit analysis process of a mixed-signal design, it is easy to ignore or gloss over a full evaluation due to time constraints. However, the saying, "pay now or pay later" applies here. It's best to be prepared to view the circuit from the frequency-domain, with a time-based analysis included, and an eye on the dc behavior.

Dc or static results are used to determine what the long term accuracy of the system is. This type of evaluation includes offset errors and gain errors, both of which provide insight into the cause of signal clipping and absolute measurement errors, important to understand. However, the differential linearity and integral linearity type of system errors provide hints about the level of overall signal distortion and, taking it a step further, the combination of the time and frequency analysis reveals the rest of the story. Time-domain data can quickly demonstrate systematic problems, such as signal modulation or drift over time, but the combination of time-domain and dc data doesn't always tell the complete story. Frequency-domain evaluations can also bring out fairly significant issues and can quickly illustrate the influence of noise sources, line frequency or the inadequacies of the analog and digital electronics in the signal path.

For frequency-domain evaluations, the Fast Fourier Transform (FFT) is the best tool with analog-to-digital conversion systems. The theory of the Fourier series is somewhat complex, but the application is simple. The Fourier transform operates on the premise that any signal or waveform can be reconstructed by just adding together one or more pure sine waves with their appropriate amplitude, frequency, and phase.

For example, a square wave can be constructed from the Fourier series, sin(x) + 1/3 sin(3x) + 1/5 sin(5x) + 1/7 sin(7x)... With the addition of each element of this series the fundamental pure sine wave (sin(x)) begins to transform into a square wave as illustrated in Fig. 1:

The result of this mathematical simplification can then be graphically illustrated, where the x-axis is shown in Hz and the y-axis in dB. This style of graphical representation is used in the analog domain by spectrum analysis tools. In the digital domain, the analysis tool is the Fast Fourier Transform (FFT) calculation.

Using the FFT Plots As a Troubleshooting Tool

An FFT plot is generated by collecting a large number of digital samples from the output of the ADC in a periodic fashion. Typically, ADC manufacturers excite their ADCs with a single tone, full-scale analog signal at the input. These curves are included in the manufacturers' specification sheets. Under these conditions the full dynamic range of the converter is exercised. This data is then converted into a plot such as the one illustrated below. The frequency scale of this style of plot is always linear, from zero to Nyquist/2. With FFT plots the Nyquist frequency is equal to the sampling frequency of the converter.

The magnitude axis (y-axis) ranges from zero down to an appropriate negative dB value, depending the number of converter bits and the number of samples included in the FFT calculation. When an analog input signal generates a full-scale output from the ADC, it will appear as a referred-to-output-zero dB on the FFT plot. Any magnitude less than full-scale can easily be converted into the digital code representation with these formulas:

D_OUT = (2^n -1)* 10 (MAGNITUDE / 20)

V_OUT RTI = D_OUT * FSR / 2^n

where,

D_OUT is a decimal representation of the digital output code. D_OUT should be rounded to the nearest integer,

MAGNITUDE is taken from the FFT plot and is in dB,

V_OUT RTI is a mathematical calculation that converts

D_OUT into the same units as the analog input voltage. RTI = Referred to Input. This number should be equivalent to the analog input voltage, V_IN,

n is the number of ADC bits,

FSR is the analog full-scale input range in volts

So the FFT plot provides frequency-domain data of a sampling system, which has the appearance of being useful. But in particular, there are five elements of the FFT plot that provide insight into the system performance.

The Fundamental Input Signal (A)

The FFT plot shown above (Fig. 2, again) was generated using a 16-bit ADC. The sampling frequency of the converter was 200 kHz. The analog input signal was 9.9 kHz (also known as the fundamental frequency [A]) and a total of 4096 16-bit words were taken from the ADC to generate this plot.

Input Signal Headroom (B)

The highest spur (A) represents the fundamental input signal to the ADC. This signal was used to exercise the converter's codes across the full-scale input range. In the data above, the input signal is exercising the converter over as much of its input range as possible. The amplitude of the fundamental frequency is -0.5 dB or 94.4% lower than full-scale. This provides headroom (B) for the conversion process, which is done to ensure that the converter is not overdriven, with the result of signal clipping. If signal clipping occurs the FFT plot will show distortion of that signal in the form of spurs at frequencies other than the fundamental.

So, if a signal is injected into the digitizing system during the frequency analysis, it is a good rule of thumb to look at the digital output signal in the time-domain. If there is clipping, adjustments should be made to avoid that condition.

Signal-to-Noise Ratio (C)

A useful way of determining how much noise is in the circuit is with the signal-to-noise ratio (C). The Signal-to-Noise Ratio (SNR) is a calculated value. It is the ratio of signal power to noise power. The theoretical limit of SNR is equal to 6.02n + 1.76 dB, where n is the number of bits. All spurs and the noise floor are included in the Signal-to-Noise-Ratio FFT calculation.

SNR = rms Signal / rms Noise
= (LSB 2^n-1/sqrt2)/(LSB sqrt12)
= 6.02n +1.76 dB

An ideal 16-bit ADC should therefore have a SNR of 98 dB but it is quite unusual to see that. Typically for SAR-type converters, 88 dB is quite good.

The SNR of the FFT calculation is a combination of several noise sources. The possible noise sources include the quantization error of the ADC, internal noise of the ADC, noise from the voltage reference, differential non-linearity errors from the ADC, and noise from the driving amplifier.

Spurious-Free Dynamic Range (D)

The spurious-free dynamic range ([D] from the plot above) quantifies the amount of distortion in the system. The spurious-free dynamic range (SFDR) is defined as the distance from the fundamental input signal to the highest spur (in dB.)

Spurs resulting from the nonlinearity of the ADC will appear as a multiple (b) of the input signal's frequency (fundamental frequency), i.e. Asin(bx), unless they are a result of aliasing. If the spurs are a result of the aliasing phenomena they are equal to:

F_i = ý(K F_s - F_a)

where,

F_i is the calculated possibilities of high frequency interference

K in a positive whole number

F_s is the sampling frequency of the ADC

F_a the aliased signal that appears on the FFT graph

In general, harmonically-related spurs are caused by errors in the ADC. Non-harmonically related spurs are a result of other device, or external, noise sources.

If the spurs are created by the ADC, it is probable that the converter has a degree of integral non-linearity. As a matter of fact, the ADC tested in the FFT plot above has a significant linearity error, the phenomena causing the spurs in the FFT plot to be quite high. With good 16-bit ADCs, an SFDR of 100 dB is quite common.

These spurs can also be created by the signal source or the driving amplifier. The frequency of these spurs is not related to the frequency of the fundamental frequency per the formula above. If the driving amplifier is the culprit it may have crossover distortion, or be unable to drive the ADC, or be bandwidth limited. Spurs can also be caused by injected noise from other places in the circuit, such as digital clock sources or the mains frequency.

Average Noise Floor (E)

The average noise floor (E) is a combination of the number bits and the number of points used in the FFT. It is not a reflection of the performance of the ADC. Regardless of the number of bits that the ADC has, the number of samples should be chosen so that the noise floor is below any spurs of interest.

Average FFT Noise Floor (dB) = 6.02n + 1.76 dB + 10log(3*M / [pi * ENBW]),

where,

M is the number of data points in the FFT,

ENBW is the equivalent noise bandwidth of the window function (see next section on how FFTs are generated),

n is the number of bits of the ADC.

A reasonable number of samples for the FFT of a 16-bit converter is 4096.

Other Specifications from the FFT

There are two other specification of interest that the FFT calculations produce: Total harmonic distortion (THD) and signal-to-noise plus distortion (SINAD). THD is the rms sum of the powers of the harmonic components (spurs) in a ratio to the input signal power.

THDrms = 20 log (sqrt((10^(2nd HAR/20))^2 + (10^(3rdHAR/20))^2 + (10^(4thHAR/20))2 + ...

Significant integral non-linearity errors of the ADC typically appear in the THD results. Many times a THD analysis that includes the first five harmonic components in this calculation is sufficient.

SINAD is a calculated combination of SNR and THD,

where,

SINAD = -20log(sqrt(10^(-SNR/10) + 10^(+THD/10))

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