Fig. 1 illustrates the internal block diagram of a typical VGA. The VGA combines a closed-loop input buffer, a voltage-controlled variable gain cell, and an output amplifier. The input buffer is a transconductance stage whose gain is set by the gain-setting resistor, R_g. The output amplifier is a current feedback amplifier and is configured as a transimpedance stage whose gain is set by, and equal to, the feedback resistor, R_f. The maximum gain, A_Vmax, is defined by the ratio of R_f/R_g. As the gain control input (V_g) is adjusted over its 0 to 2-V range, the gain is adjusted over a range of 80 dB relative to the maximum set gain.

Figure 1: Internal block schematic of a typical VGA

Typical VGA Configuration

Fig. 2 illustrates a typical variable gain block and the maximum gain of this configuration is equal to R_f/R_g.

Figure 2: Typical variable gain block

Common Applications: Automatic Gain Control

The most common application for high-speed VGAs is Automatic Gain Control (AGC) loops. The defined goal of an AGC circuit is to keep the output at a fixed level, given a varying input signal amplitude. Traditionally, an AGC circuit includes a variable-gain amplifier with an analog feedback loop to generate the necessary gain and attenuation control signal; typically, the feedback loop performs integration and rectification.

Fig. 3 illustrates a VGA used in a typical AGC application. A dual voltage-feedback amplifier (VFA) is used to drive the gain control pin of the VGA. R₁ and R_y set the gain of the rectifier. R_x, R_y, and C provide a time constant that sets the acquire and hold times. The adjustable resistor, R_adj, sets the inverting pin of the integrator to the initial condition of +1 V. When the rms current of the signal is greater than the negative current of R_adj, the integrator decreases the gain of the VGA. And when the signal drops below the R_adj current, the VGA's gain is increased.

Figure 3: Dual VFA controlling a VGA for AGC

Digital Gain Control

Digital variable-gain control can be easily realized by driving the gain control input of a VGA with a DAC. Fig. 4 shows a DAC, a JFET input op amp, and a VGA. With V_ref set to 2 V, the circuit provides up to 80 dB of gain control in 512 steps, with up to 0.05% full-scale resolution. The maximum gain of this circuit is 20 dB.

Figure 4: 512-step digital gain control circuit

2nd Order Tunable Bandpass Filter

The center frequency of the filter shown in Fig. 5 is adjusted through the use of the VGA's gain control voltage, V_g, while the integrators implemented with two VFAs, provide the coefficients for the transfer function.

Figure 5: Using a VGA with differential inputs as a cable equalizer

Differential Equalizing Cable Receiver The VGA used here has a differential input and realizing that the gain setting element can be used to shape the frequency response, an equalizing receiver can be implemented as shown in Fig. 6. The gain-setting network implements a series of zero/pole pairs that compensate for the 1/ roll-off of various cables. At low frequencies the gain starts out set by only R_go. The resistor and capacitor values are set such that C3, C2, and C1 short out sequentially, smoothly increasing the gain by placing a decreasing impedance in parallel with R_go. Additional RC pairs can be added to improve the approximation. In this circuit, the maximum high frequency current in the gain setting network will be set by R_g1 paralleled with/ R_go.