Analog design can appear to be more black magic than science when it comes to noise problems. A common ailment for a designer is to have the analog, hardware, portion of the circuit built only to find that somewhere a gremlin is generating enough noise to force him back to the drawing board. This ‘wait and see’ design technique can bring about successful designs; eventually. Another approach to avoiding noise problems is to use a basic list of guidelines in conjunction with a knowledge of noise-related fundamentals to guide decisions at the beginning of the design cycle.

Any circuit noise can be categorized into one of three fundamental types. These types are device noise, radiated noise and conducted noise. If a noise problem can be properly identified as one of these types, most noise-reduction solutions become obvious.

In general, passive devices will be the least of the problems. A resistor will generate noise in accordance with:

Rnoise = ( 4*k*T*R *BW),

where, k is Boltzman’s constant equal to 1.38^e-23 J/K

T is temperature in ý Kelvin (K)

R is resistance in W

BW is bandwidth in Hz

Although capacitors and inductors generate very little noise, they become a noise source relative to time in switching and sampling networks.

Most typically, operational amplifier noise and A-to-D conversion noise dominate device noise contribution problems. The noise contribution of operational amplifier-based devices, such as op amps, instrumentation amps, and difference amps are characterized with many of the parameters shown (see Fig. 1a.) In contrast, the noise contribution from mixed-signal devices are characterized with the parameters (see Fig. 1b.)

If a "noisy" device is identified, an easy solution may be to replace it with a lower noise part. If a replacement is not available the noise generated by the device will conceptually become conducted noise. Solutions for conducted noise problems are discussed later.

The most common radiated noise problem found in a PCB implementation is capacitively-coupled noise between two traces. This type of noise is generated when a fast-switching trace is in close proximity to a high impedance trace. As an example, a digital clock with fast rise and fall edges will easily couple into a trace that is directly connected to the input of a high-impedance instrumentation amplifier as seen in a diagram of a PCB constructed capacitor (see Fig. 2.)

The design equation that quantifies a PCB capacitor is:

Capacitance = w * L * e0 * er / d

The radiating capability of these two traces is described with the formula:

i = C (dV/dt),

where,

i is current

C is capacitance

dV/dt is change in voltage with time

In the example above, a digital clock could easily switch from 0 to 5 V in approximately 50 ns, which would equate to a dV/dt of 100 V/m s. If two traces come in close proximity (d = 10 mils = 0.000254 m) for 0.05 m (L) the capacitor value of this construction is 5.2 fF. Given these dimensions, the current that will couple into the analog, high impedance trace is 0.52 m A. If the impedance of the analog trace is 10 kW , a 5.2 mV peak noise spike will be seen on the analog trace with every transition of the digital clock.

The dielectric constants, e0 and er and the trace thickness (w) are not easily controlled by the designer, but the remaining dimensions of the capacitor are. If the parallel distance (L) of the traces are shortened the capacitance is reduced. Additionally, if the distance (d) between the traces is increased the capacitance will again increase.

This type of noise is the kind that can be found on the power and signal traces. The worst possible scenario is where conducted noise is found on ground traces or the ground plane. Conducted noise originates from devices or radiating sources. All devices that are used in the analog signal chain and are used to build power supplies produce noise as discussed above. One obvious solution to a conduction noise problem is to find the source of the noise and eliminate it. In many cases this is impossible. If it is accepted that the device noise in the system has been reduced as much as possible, there are alternatives. The circuit design can be modified or layout design strategies can be implemented that will reduce conducted noise to a level where it doesn’t have an influence on the operation of the circuit.

Ground and power noise is the most common conducted noise and the easiest to minimize. These traces or planes can have mains frequencies (50 or 60 Hz), the switching frequency of a power supply, or voltage and current noise from digital switching networks, to name a few. There are three fundamental techniques that can be used to minimize design risk.

1.) Bypass, Bypass, Bypass

2.) Use low impedance ground and power planes

3.) Carefully place digital versus analog, and high-speed versus low-speed devices on the board with respect to the power and ground source.

Did I Mention Bypass?

Bypass capacitors are generally understood by most designers as critical elements for success. Regardless, this fundamental design rule is overlooked by the best. Every active element on the board, whether it is analog or digital, should have its own bypass capacitor. Each bypass capacitor should be carefully selected to match the requirements of the device it services. For instance, high-frequency amplifiers generally need ceramic bypass capacitors ranging from 0.1 m F to 0.001 m F. In contrast, low-frequency devices require bypass capacitor values from 0.1 m F to 10 m F. The selection of the value of the capacitor is critical, so critical that many manufacturers provide application circuits with recommendations.

The fundamental purpose of this capacitor is to filter out power supply noise over the vulnerable frequency range where the device is capable of processing signal reliably and the power supply rejection capability of the device is not effective. One manufacturer curve that is helpful in device data sheets is the power supply rejection (PSR) versus frequency plot. For example, on a PSR-vs.-frequency curve of a 12-bit, 100-kHz sampling ADC (see Fig.3) notice that the dc rejection is quite good at ~ -81 dB. This implies that a dc change in the power supply will be attenuated by 80 dB or 10,000 V/V. The ideal signal-to-noise ratio of a 12-bit converter is 74dB. Consequently, the power supply noise near dc will not be a problem with the device represented but it is easy to see that higher frequency power supply noise may be a problem.

Take, for example, an application where the power trace is has noise on it, i.e. 5V (dc) ý 20 mV p-p white noise. The ADC must have a power supply rejection of less than -30.3 dB. The converter shown (Fig. 3, again) can do that until approximately 2 MHz at which time a bypass capacitor would be useful.

In the frequency-vs.-impedance response of several capacitors (see Fig. 4) most typically ceramic bypass capacitors are recommended for higher-frequency applications. This type of capacitor is preferred because it is small, inexpensive, with good stability, low impedance and low inductance. From the graph (Fig. 4, again), a 0.1 m F to 1.0 m F capacitor would be an appropriate selection for the ADC (of Fig. 3.) Bypass capacitors should be placed as close to the device pin as possible and the leads to the capacitor should be kept as short as possible.

Ground and Power Planes

Assuming that a ground plane is not needed is a dangerous assumption in any circuit with analog and/or mixed-signal devices. Ground noise problems are more difficult to deal with than power supply noise problems because analog signals are most typically referenced to ground. When determining the grounding strategy of a board, the task at hand should actually be to determine if the circuit can work adequately with just one ground plane or does it need multiple planes. In all cases, the ground plane should have none to a few breaks due to a signal trace. These breaks should be kept to a minimum. Current return paths should not be "pinched" as a consequence of these traces restricting the easy flow of current from the device to the ground connector.

If a single ground plane is used, the analog and digital devices will share the same plane. With this circumstance the circuit must have a minimum amount of digital circuitry on board. The qualifier, minimum, is defined by the board designer. The danger with connecting the digital and analog ground planes together is that the analog circuitry can pick up the noise on the supply pins and couple it into the signal path. In either case, the analog and digital grounds and power supplies should be connected together at one or more points in the circuit to ensure that the input and output ratings of all of the devices are not violated.

The inclusion of a power plane in 12-bit systems is not as critical as the required ground plane. Although a power plane can solve many problems, power supply noise can be reduced by making the power traces two or three times wider than other traces on the board and by using bypass capacitors effectively.

Device placement is critical. In general, some devices are more sensitive to noise than others. Here is a quick way to identify or zero in on potential problems:

1. Separate the circuit devices into two categories; high-speed (>40 MHz) and low-speed.

2. Separate the above categories into three sub-categories; pure digital, pure analog, and mixed signal.

The board layout strategy should map the diagram (see Fig. 5.) Notice the relationship of digital-vs.- analog and high speed-vs.-slower speeds to the board connector.

Where to Look First

#1 Conducted Noise

a) When troubleshooting a design or circuit, always double check whether bypass capacitors are being used, if they are the right value and if they are placed as close as possible to the device pin.

b) Make sure the digital current return paths (to the connector) do not flow across any sensitive analog trances, This exercise should be performed on the ground and power planes.

#2 Device Noise

a) All devices will generate noise. Typically, the active device will be more apt to generate noise as opposed to passive components. Revisit the active device’s specification sheets.

#3 Radiated Noise

a) Identify all traces that are next to each other. Evaluate their potential on the length of the parallel portion, the distance between the traces, the change in voltage with time activity of each trace along with the impedance of each trace.