This article originally started as an attempt to make a cook book solution for a true 12-bit layout. This endeavor was taken under the assumption that the final product would be a good reference design for 12-bit ADC users. It didn’t take long to find out that this task was difficult to complete, that the notion was fairly unrealistic. There are a multitude of successful ways to lay out systems with 12-bit ADCs and each layout is highly dependent on the number of devices in the circuit, the types of the devices (digital or analog) and the environment that the final product will reside in. Given all of these variables it could easily be demonstrated that a layout that successfully provides twelve noise-free bits from an analog signal may easily be a dismal failure in another setting.

So as an alternative approach, this article will instead provide basic guidelines and end with a review of issues to be aware of. Throughout, examples of good and bad layout implementations will be discussed. This will be done in the spirit of discussing concepts and not with the intent of recommending one layout as the only one to use.

Getting a Good Start

Imagine that the task at hand is to design a pressure-sensing circuit that will accurately measure pressure and present the results on an LCD display screen. Seems easy enough.

In a possible circuit for this type of system (see Fig. 1) the pressure sensor chosen for the job is piezoresistive, which can be modeled as a four-element bridge. This particular sensor, the SLP010D from SenSym, can be used with a voltage excitation supplied from the power supply source. The full output swing of the sensor is a small (45 mV) differential signal that most appropriately is gained by an operational amplifier structure that also converts the differential output of the sensor to a single-ended analog signal. A 12-bit converter is chosen to match the precision of the pressure sensor and the digital output code is sent to a microcontroller whose job is to perform tasks such as calibration corrections and linearization. Once these are done the results are sent to the LCD display.

The preliminary design work of this sensor circuit is to determine the gain of the instrumentation amplifier and evaluate sensor and circuit-error sources. This would include working through the calibration and linearization issues associated with the pressure sensor. Finally, after these circuit design issues are understood, the microcontroller firmware is developed.

Now the board is ready to go to layout.

One Step Forward, Two Steps Back

The size of this circuit appears to be manageable. The circuit seems so small that a designer (who is usually under the gun to produce an end product quickly) might be tempted to use the auto router utility with the layout tool. If care is not taken, this would be a quick way to ensure a bad end for the layout design. On the other hand, if the tool is capable of implementing restrictions the layout design may have a fighting chance; without restrictions implemented, the best approach is to not use the tool at all.

General Layout Strategies:

Device Placement

Device placement is critical. In general there are two classes of devices: noise-sensitive and problem creators. With the circuit (Fig. 1, again) the inputs of the two amplifiers are all high impedance and could be prime targets for capacitively-coupled noise. Alternatively, the PIC microcontroller requires an external clock (which could be a problem creator) and performs a fair degree of switching. These two problems can easily be turned into non-issues with careful device placement. Here is a quick way to start to map a good layout strategy:

1. Separate the devices in the circuit into two categories; high speed (>40 MHz) and low speed, on the board.
2. From the above two categories, separate the devices into three sub-categories: pure digital, pure analog, and mixed signal.

Given these divisions, the board layout strategy should map (see Fig. 2) the relationship of devices that are digital versus analog and high speed versus slower speeds to the board connector. The digital and analog circuit (Fig. 2b) are separate from the digital devices, which are closest to the connector or power supply. The pure analog devices are furthest away for the digital devices to ensure that switching noise is not coupled into the analog signal path.

One of the most common layout questions is, "What plane (analog or digital) does the ADC reside on?" The confusion comes from the fact that is no clear-cut rule. The treatment of the ADC in layout varies from technology to technology. For instance, if the ADC uses a successive approximation register (SAR) design approach, the entire device should be connected to the analog power and ground planes. A common error is to have the SAR converter straddle the analog and digital planes.

This mistake usually happens because many SAR ADCs have two ground pins, labeled Analog Ground and Digital Ground. This strategy may work, but as the accuracy specifications of ADCs improve the digital ground and power-plane noise can cause problems by feeding back into the analog portion of the ADC IC. For high-resolution SAR converters a digital buffer should be used to isolate the converter from bus activity on the digital side of the circuit.

In contrast, if the ADC is designed using a delta-sigma technology, it should straddle the analog and digital planes. This is due to the fact that the Delta-Sigma Converter is primarily digital.

Ground and Power Supply Strategy

Once the general vicinity of the devices is determined the ground planes and power planes should be defined. The strategy of implementing these planes is a bit tricky.

First of all, making the assumption that a ground plane is not needed is dangerous in any circuit with analog and/or mixed-signal devices. Ground noise problems are more difficult to deal with than power supply noise problems due to the fact that analog signals are most typically referenced to ground. For instance, in the circuit (Fig. 1, again) the ADC’s inverting input pin is connected to ground. Additionally, the negative side of the pressure sensor is also connected to ground. If these two points are not equivalent in voltage at dc as well as over frequency, an error signal can be injected into the analog-to-digital conversion process.

These types of errors can be difficult, if not impossible, to remove.

A layout for the circuit (see Fig. 3) is a bad layout implementation because it doesn’t have ground or power planes. With this circuit layout the controller is dedicated to interfacing with the converter and sending the converter’s results to the LCD display.

The digital output of the converter (see Fig. 4) over time was collected with no excitation being applied to the sensor.

The question for the layout designer should not be whether or not it is necessary to include a ground plane. It should be, "how many planes do I need to make the circuit perform up to expectations?" The ground plane that is added (see Fig. 5) has a few breaks due to signal traces. These breaks should be kept to a minimum and current-return paths should not be pinched, as a consequence of these traces, which would restrict the easy flow of current from the device to the power connector.

The histogram for the ADC output (see Fig. 6) shows much tighter output codes than before. The same active devices were used for both tests but the passive devices were different causing a slight offset difference. The noise shown with the ADC digital code is now assignable to the op amp noise and the absence of an anti-aliasing filter.

If the circuit has a minimum amount of digital circuitry on board, a single ground plane and a single power plane may be appropriate. The board designer defines the qualifier. The danger of connecting the digital and analog ground planes together is that the analog circuitry can pick up the noise on the supply pins and couple it into the signal path. In either case the analog and digital grounds and power supplies should be connected together at one or more points in the circuit to ensure that the power supply, input and output ratings of all of the devices are not violated.

The inclusion of a power plane in a 12-bit system is not as critical as the required ground plane. Although a power plane can solve many problems, making the power traces two or three times wider than other traces on the board and by using by-pass capacitors effectively can reduce power noise.

Signal Traces

Generally speaking, the signal traces on the board (both digital and analog) should be as short as possible. This basic guideline will minimize the opportunities for extraneous signals to couple into the signal path. One area to be particularly cautious of is the input terminals of analog devices. These input terminals normally have a higher impedance than the output or power supply pins. As an example, the voltage-reference input pin to the ADC is most sensitive while a conversion is occurring. With the type of 12-bit converter (Fig. 1, again) the input terminals are also sensitive to injected noise.

Another potential for noise injection into the signal path is the input terminals of an operational amplifier. These high-impedance input terminals are sensitive to injected currents. This can occur if the trace from a high-impedance input is next to a trace that has fast changing voltages, such as a digital or clock signal.

When a high-impedance trace is in close proximity to a trace with these types of voltage changes, charge is capacitively-coupled into the high-impedance trace. The value of the capacitance between two traces is primarily dependent (see Fig. 7) on the distance (d) between the traces and the distance that the two traces are in parallel (L). From this model, the amount of current generated into the high-impedance trace equals:

I = C d V/d t

where

I equals the current that appears on the high-impedance trace

C equals the value of capacitance between the two PCB traces

d V equals the change in voltage of the trace that is switching, and

d t equals the amount of time that the voltage change took to get from one level to the next.

Did I Mention By-Pass Capacitors?

A good rule concerning by-pass capacitors is to always include them in the circuit. If they are not included the power supply noise may very well eliminate any chance for 12-bit precision. By-pass capacitors belong in two locations on the board: one at the power supply (10 m F to 100 m F or both) and one for every active device (digital and analog.) The value of the device’s by-pass capacitor is dependent on the device in question. If the bandwidth of the device is less than or equal to ~10 MHz, a 0.1 m F will reduce injected noise dramatically. If the bandwidth of the device is above ~50 MHz, a 0.01m F capacitor is probably appropriate. In between these two frequencies, both or either one could be used. Refer the manufacturer’s guidelines for specifics.

Every active device on the board requires a by-pass capacitor. The by-pass capacitor must be placed as close as possible to the power supply pin of the device (Fig. 5, again.) If two by-pass capacitors are used for one device, the smaller one should be closest to the device pin. Finally, the lead length of the by-pass capacitor should be as short as possible.

To illustrate the benefits of by-pass capacitors, data was collected from the layout (of Fig. 5 without the by-pass capacitors and shown in Figure 8.)

PCB Design Check List

Good 12-bit layout techniques are not difficult to master as long as a few guidelines are considered:

1. Check device placement versus connectors. Make sure that high-speed devices and digital devices are closest to the connector.
2. Always have at least one ground plane in the circuit.
3. Make power traces wider than other traces on the board.
4. Review current return paths and look for possible noise sources on ground connects. Determining the current density at all points of the ground plane and the amount of possible noise present does this.
5. By-pass all devices properly. Place the capacitors as close to the power pins of the device as possible.
6. Keep all traces as short as possible.
7. Follow all high-impedance traces looking for possible capacitive-coupling problems from trace-to-trace.

References

Morrison, Ralph; "Noise and Other Interfering Signals," John Wiley & Sons, Inc., 1992

Baker, Bonnie, "Noise Sources in Applications Using Capacitive Coupled Isolated Amplifiers", AB-047, Burr-Brown Corporation