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Design Flow for Multiple Power Supply Levels


Atmel Corporation

This Application Note describes a recommended methodology for managing the problem of designs with multiple power supply levels.

Designs with multiple power supply levels contain blocks of standard cells of I/Os supplied by power sources at different voltage levels.

Such designs may include:

  • Some blocks that are always powered and others that are occasionally powered
  • Different blocks with different voltages

Click here for the full Application Note.

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