|
||||||||||||||||||||||||||||||||||
|
|
||||||||||||||||||||||||||||||||||
|
||||||||||||||||||||||||||||||||||
|
|
Pin Sharing
IBM's CMOS application-specific integrated circuit (ASIC) products include options with large numbers of signal inputs and outputs (I/O). However, few ASIC designers are willing to dedicate many signal I/O lines for component testing. By following the guidelines in this applications note, the ASIC designer can share system I/O functions with test functions, maximizing I/O utilization.
Click here for the full Application Note.
|
|||||||||||||||||||||||||||||||||
|
Copyright © 2003 ChipCenter-QuestLink About ChipCenter-Questlink |
||||||||||||||||||||||||||||||||||