Synopsys Adds Noise Modeling Capabilities

LSI Logic Licenses ARM11 Cores

Synchronicity and VCX Set Partnership

OCP-IP Develops SystemC Modeling Methodology

Cadence Palladium System Selected by S3

Synopsys Advances Tool Interoperability

SynTest's Simulator Links to Novas' Debussy

Tensilica Licenses Core to Agilent

Thales to Use Agilent's Design System

LogicVision's Solutions Selected by QLogic

Tensilica Previews Next-Generation Xtensa

Magma's RTL-to-GDSII Flow Adopted by Xellink

Hudson Licenses Tensilica's Xtensa Processor

Cypress Licenses Tensilica's Xtensa Processor

Telelogic Lands First Customer

MIPS Licenses 32-bit Core to Micronas

ARM Launches ARM11 PrimeXsys

Monterey Design Deployed by Tau Networks

LSI Logic Extends High-Speed I/O Leadership

ARM Releases Two ARM11 Cores

ModelSim Achieves Sign-Off at austriamicrosystems

TI Licenses Next-Generation ARM11

Mentor Receives SAP Certification

QUALCOMM Licenses ARM Core

Aldec's Riviera 2002.09 Released

Axis Verification System Selected by Coolsand

Monterey Rolls Out Second RTL-to-GDSII Solution

MegaChips Adopts @HDL Software

Magma Announces First-Pass Silicon Success

Accelerated Technology's Software Certified

Sonics Smart Interconnect IP Optimized for TI

Monterey Software Adopted by Canon

Magma and IBM Collaborate

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