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Date Headline
06/19/00Actel To Offer FPGA IP Cores
06/19/00Avant!'s New Jupiter Features
06/12/00TransEDA Introduces Design Rule Checker
06/12/00Magma Delivers RTL to Silicon Flow
06/12/00Synopsys Introduces CoCentric Compiler
06/12/00Quickturn's New Emulation/Prototyping Gear
06/05/00Get2Chip Introduces VOLARE
06/05/00Monterey Releases Dolphin 1.2
06/05/00Aptix Initiates Internet Service
06/05/00Synopsys and Avant! Launch Internet Service
05/30/00Avant! Releases Simulation Tool
05/30/00Infineon Announces 0.18 micron Embedded DRAMs
05/30/00Numerics Announces Design Productivity Program
05/30/00Synopsys Introduces PrimePower
05/22/00Sapphire Is On the Web
05/22/00Circuit Semantic's Tool for Hard IP Block Migration
05/22/00NEC reaches ACE-2 Milestone
05/15/00Toshiba Offers 64-Bit MIPS Core
05/15/00Vulcan Announces Java Core
05/15/00Mentor Graphics Acquires Escalade
05/15/00Synplicity Sets Program for ASIC Prototyping
05/15/00Co-Design Launches New Product Line
05/08/00Verisity Donates e To OVI
05/08/00Mentor Graphics Expands Renoir's Capabilities
05/08/00Real Intent Announces Intent-Driven Verification
04/28/00LSI Logic Announces IEEE 1394 Core
04/28/00MIPS and Microware Team
04/28/00Mentor Graphics Launches Equivalency Checker
04/21/00Denali Launches Memory Portal
04/21/00Mentor Graphics Strengthens its SoC Leadership
04/21/00Axis Combines Emulation and Simulation
04/21/00Aptix Announces 1.8 Million Gate System
04/17/00Verisity and Mint Technology Partner
04/17/00Chip Express Focuses on Volume Production
04/07/00Synopsys Upgrades VCS 5.2
04/07/00Cadence to Address Electronics Supply Chain
04/07/00Synopsys Announces Synthesis 2000
04/07/00IBM Reveals Low-K Technology
03/31/00Synopsys Introduces CoCentric System Studio
03/31/00PCI-X Model From Synopsys and Compaq
03/31/00Cadence Unveils Internet Strategy
03/31/00Frontier Introduces C-Language Synthesis Tool
03/31/00Cadence Introduces the First Unified Design System
03/23/00MIPS and TSMC Form Alliance
03/23/00Move Strengthens DesignWare's Leading Position In Commodity IP Market
03/23/00LavaLogic Announces Benchmark Results
03/23/00LSI Logic Moves to 0.13-Micron Process
03/13/00Avant! Announces Design VERIFYer 3.0
03/13/00Prolific Launches ProGenesis 2000
03/13/00Xilinx and Synopsys Ease Path For FPGA Design
03/13/00Open Verilog International and VHDL International to Merge
03/13/00Cadence Adds Analysis Capability to Affirma
03/13/00Synopsys Introduces Dual-Language Simulator
03/03/00Mentor Graphics Announces Model For Tensilica Processor
03/03/00Quickturn Partners With Simutech
03/03/00LightSpeed Announces Reprogrammable ASIC
02/24/00Xilinx announces HDLC Cores
02/24/00Xilinx Announces QDR Reference Design
02/24/00Altera Redefines PLD Development Tool Business Model
02/17/00Chip Express Introduces FPGA Replacement Program
02/17/00RealChip Licenses Palmchip's CoreFrame Architecture
02/17/00LightSpeed to Offer UTOPIA Core
02/07/00HDAC Releases Version 1.4 of Solidify
02/07/00Novas Upgrades Debussy
02/07/00UMC Serves System Design House Requirements
02/07/00Oki Semiconductor Announces uPLAT Integration Platform
01/31/00Quickturn Introduces HW/SW Co-Verification System
01/31/00Aptix Announces Front End For System Explorer
01/31/00Synopsys Release New Version of Formaility
01/24/00Motorola Announces Reuse Documetation Standard
01/24/00Adaptive Silicon Inc. Receives Investment from Synopsys
01/24/00Cadence and NumeriTech Execute Licensing relationship
01/24/00LightSpeed Adds CAST Cores
01/18/00Quickturn Yo Use Novas Debugging Tool
01/18/00LightSpeed Offers PXI-X ASIC Core
01/18/00Cadence Ships HW/SW Co-Design Tool
01/10/00Cadence Extends Model Packager to VHDL
01/10/00C Level Design Acquires Easic C/C++ Tools
12/20/99Sirius Releases MaxCmizer Software for 3G Simulation
12/20/99Cadence Reduces Price On VHDL Simulator and Adds New VHDL Desktop Version
12/20/99TransEDA Introduces Verification Tools
12/20/99Toolwire Moves on Internet-Based Design
12/08/99APTIX Launches Module Verification Platform
12/08/99ICT Offers PLD Cores for SOCs
12/08/99Lucent Tames SiGe Process
11/30/99Verisity Adds Dual-Language Support
11/30/99Summit Design Launches Sixth Generation of Visual HDL
11/30/99Lucent Develops Internet Phone Kit
11/30/99Superlog Program Launched by Co-Design Automation
11/30/99Avant! Introduces Star-RCXT
11/17/99NEC Details Design Methodology
11/17/99Cadence Releases Physical Library Format
11/17/99Synopsys Introduces Physical Compiler
11/11/99Synopsys and ARM Team to Deliver Industry's First Mixed-Language Solution for Secure, Portable IP Models
11/11/99Patriot Scientific Announces Microprocessor Cores Available as Commercial Products
11/11/99Model Technology Provides Industry's First 64-bit HDL Simulator
11/03/99Artisan Components' Latest Libraries To Debut On TSMC 0.15-Micron Process
11/03/99Motorola and Theseus Logic TO Develop ICs
11/03/99TTP Communications and Alcatel Announce Bluetooth Alliance

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