Cadence Acquires IBM's Test Tools

The manufacturer says . . .

Murray Disman says . . .

Cadence, IBM Team to Simplify Chip-Design Process SAN JOSE, Calif. and EAST FISHKILL, N.Y.--Sept. 30, 2002--Cadence Design Systems, Inc., the world's leading supplier of electronic design products and services, and IBM announced a series of agreements intended to simplify the chip-design process for their customers, while helping them tap the latest in chip technologies. Under the first agreement, IBM will extend its use of existing, and add new, Cadence electronic design automation (EDA) software tools in its design of microchips for both internal purposes as well as for external customers. Under a separate agreement, Cadence will also acquire the intellectual property associated with select IBM in-house EDA test tools for incorporation into the Cadence product family. This will bring commercial design automation support to IBM's customers to help them take full advantage of IBM's test methodology and technology, and make that technology more broadly available. Under a third agreement, the two companies plan to collaborate on future EDA technology to address growing chip design challenges as circuit sizes continue to shrink to 90 nm and smaller nodes. "Cadence is delighted with this significant expansion of our relationship with IBM," said Ray Bingham, president and chief executive officer of Cadence. "Our goal is to help our customers achieve first-silicon success. By teaming with a recognized leader in complex chip designs and in chipmaking technology, we believe we can help our customers not only handle the growing complexity of chip design, but also conquer the challenges presented by nanometer-scale manufacturing technologies." EDA software tools are used collaboratively by chipmakers and designers with their customers to develop new chip designs. That process is made easier if both parties are familiar with, and use, the same tools. These agreements between Cadence and IBM are intended to promote greater commonality between the tools used by IBM and its customers, while also opening up broader access to more of IBM's extensive in-house design technology. "IBM has a unique combination of process technology, intellectual property, EDA tools, and design expertise that we're working to make more broadly available to customers," said John Kelly, senior vice president and Technology Group executive for IBM. "As the number one EDA tool supplier, with both deep design skills and experience in a broad range of applications, Cadence is a natural choice as a company to work with. We believe IBM and Cadence can collectively provide our customers with a more comprehensive set of tools and services to meet their needs." These agreements follow an August 22, 2002, IBM/Cadence Design Foundry announcement in which the two companies outlined plans to help customers enhance new chip designs by providing a complementary set of intellectual property (IP), design skills, and advanced manufacturing services. IBM's relationship with Cadence is part of a strategy to make IBM's leading-edge chipmaking technology more readily available to customers through high-end foundry and custom ASIC (application-specific integrated circuit) design services, as well as a portfolio of standard chip products.

The most important aspect of this announcement is Cadence's acquisition of IBM's test tools, its DFT group, and associated IP. The tools cover test synthesis, test-pattern generation, manufacturing test, and diagnostics. Cadence will require some time to commercialize the tools and make them process-independent. The big three, Cadence, Mentor, and Synopsys, are, or will soon be, supplying DFT software. This is typical of what happens when a specialized design area grows in importance. At first, the area is served by small firms with point tools. Signal integrity is an example. The majors then move in when the area grows in importance in terms of either revenues or its impact on device performance and/or cost. These companies are often able to produce improvements important to the designer when integrating these tools into their design flows.

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