Artisan Delivers 90 nm Library

The manufacturer says . . .

Murray Disman says . . .

Artisan Components Delivers Industry's First Suite of Library Products for TSMC's Nexsys 90 nm Technology Extends Artisan and TSMC's Long-Term Relationship with Announcement of Free Library Products Available Immediately for Download from Artisan's Web Site SUNNYVALE, Calif.--Nov. 20, 2002--Artisan Components, Inc., a leading provider of semiconductor intellectual property (IP), announced the immediate availability of simulation views for the industry's first suite of library products optimized for Taiwan Semiconductor Manufacturing Company's (TSMC's) Nexsys 90 nm (CLN90G) process technology. As part of Artisan's Free Library Program, licensed customers can download these products from Artisan's Web site at no charge. Artisan's suite of library products, developed under the terms of an ongoing agreement between Artisan and TSMC, include Artisan's SAGE-X Standard Cell Library, memory generators for single- and dual-port SRAM, single- and two-port register files, and diffusion-programmable ROM. The products are fully compliant with TSMC's 90 nm design rules, characterized using TSMC's latest electrical models, and include support for Artisan's extensive set of simulation views and physical design models of the industry's leading EDA tools. "The delivery of these 90 nm library products is a result of our long-term relationship with Artisan and the commitment both companies have for providing quality SoC-enabling technologies," said Dr. Genda Hu, vice president, TSMC Corporate Marketing. "Offering designers the ability to begin their design implementations today allows them to immediately exploit the advantages of TSMC's Nexsys 90 nm technology for SoC." "This milestone leverages the years of cooperation between Artisan and TSMC in providing customers with early access to design solutions in advanced technologies like the Nexsys 90 nm process," said Mark Templeton, president and CEO of Artisan Components. "Extensive customer feedback from designs in 0.15 and 0.13 µm technologies has resulted in Artisan 90 nm products with a wide range of new features focused on design for manufacturability in deep sub-micron technologies." New Product Features Artisan's new memory generators include an enhanced version of Artisan's Flex-Repair redundancy technology, optional error-correction circuits (ECC) to perform soft-error repair, and memory built-in-self-test (BIST) support. Developed in close cooperation with leading suppliers of design-for-test (DFT) solutions, Artisan's memory solutions are designed with an "open-standard" interface to allow easy interoperability with either proprietary or leading third-party embedded-memory test solutions. Artisan's SAGE-X Cell Library, a standard in the industry across technology nodes from 0.25 to 0.13 µm, offers customers a migration path to 90 nm technology. The CLN90G library has both standard and low-leakage configurations, allowing users to optimize their design for speed and leakage power simultaneously. In addition, the SAGE-X Library provides a robust solution for signal integrity issues. Product Availability Simulation views for Artisan's memory generators and the standard configuration of SAGE-X Standard Cell Library are available immediately. Simulation views for the SAGE-X Standard Cell Library configured for low leakage are expected to be available at the end of Q4 2002. Complete views for all these products are expected to be available in the first quarter of 2003. Under Artisan's Foundry Library Program, these library products can be downloaded by licensed customers free of charge from Artisan's Web site.

Artisan has recently made a number of announcements about the availability of its libraries for 90 nm processes. In addition to the release that describes its libraries for TSMC's Nexsys 90 nm process, the company has announced agreements with Cadence and Synopsys related to resolving signal-integrity issues at 90 nm and below. Simulation views of its library are now available for the Nexsys 90 nm process. The delivery of complete views is planned for 1Q03. Synopsys and Artisan announced that they have defined new noise-modeling capabilities in Liberty, Synopsys's open-library format. In addition, the libraries will support signal-integrity analysis and Synopsys' scalable polynomial delay model to improve temperature and voltage modeling for the libraries. The companies plan to start beta testing of the tools and libraries before the end of 2002. Cadence and Artisan announced a five-year agreement to jointly develop tightly integrated systems, including IP libraries, design technology, and semiconductor process data to manage the risks of nanometer design. Artisan will extend the models for its standard-cell and memory libraries to include the characterization data required for the Cadence signal-integrity solution, and will use Cadence's Spectre Circuit Simulator to recharacterize its libraries. The ramp at 90 nm will take considerable time and effort. The move to 130 nm with full copper and low-k dielectric has taken considerably longer than expected. Some of the blame can be attributed to the recession in the electronics industry, but most of the blame results from process and yield problems and the high cost of the NRE and the design effort. These problems, plus a few others, will be exacerbated at 90 nm.

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