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The design complexity of control-dominated SoCs has reached a level where efforts to isolate and correct functional and performance design errors, after fabrication, is prohibitively high. SoC development requires that these errors be detected and corrected via simulations early in the design stages. This added step to current design flow provides the only hope to deliver on schedule, full rather than half, the promised SoC performance, by early correction of the SoC architecture (embedded SoC software (SW), hardware (HW) and memory). SoC simulation enables concurrent development of embedded SW and HW, as opposed to developing SW sequentially using the actual silicon, further reducing time-to-market.

The use of simulation for SoC presents new challenges. SoC integrates designs such as CPUs, signal and protocol processors (IP) from different sources. The SoC developer requires accurate simulation models of these designs from vendors to enable chip-level HW-SW cosimulation. Cynergy System Design empowers the SoC developers to add this critically needed simulation step. Cynergy provides a complete set of tools to deliver protected IP simulation models and to create an Open Simulation Platform (OSP) for reusing existing SoC HW and SW design tools and internally developed verification environments. An OSP uses an open and flexible simulation architecture that allows HW or SW IP and tool providers to add their components to the OSP for fast and accurate system simulation.

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