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The SHARC in the C


Circuit Cellar Online
THE MAGAZINE FOR COMPUTER APPLICATIONS
Circuit Cellar Online offers articles illustrating creative solutions
and unique applications through complete projects, practical
tutorials, and useful design techniques.

THE SHARC IN THE C

Lessons from the Trenches by Michael Smith

Start ý Register Comparison ý Memory Access ý Modify and Volatile Registers ý Length and Base Registers ý Hardware and Software ý Interrupt Handling ý Sources and PDF

LENGTH AND BASE REGISTERS

There are two sets of 21K registers that have no equivalent in the 68K architectureýthe base and length registers. The length register significantly affects accessing data arrays within a C/C++ program.

This effect is hidden in the code sequences, which use the C default settings of the length and base registers. Listing 1 shows the C code and assembly language needed to calculate the sum of the first three elements in a 10-element array using an autoincrementing pointer for both 68K and 21K processors. The only difference is the need to perform a 21K load-memory-to-register operation before performing the ADD. The 21K doesnýt have the complex addressing capabilities of the 68K CISC architecture. Mind you, a 40-MHz 21K performs the fetch-and-add operation in two clock cycles, while a 40-MHz 68K takes 16 cycles.

Listing 2 has a hidden kick in its operation, although it looks similar to Listing 1. The length (L4) and base registers (B4) establish a two-word long circular buffer. The first two memory fetches work as expected. However, in the second post-modify operation, index register I4 is incremented to point to VALUES[2] and then modified by the SHARC circular buffer hardware to point back to VALUES[0] (see Figure 2).

For standard C array handling, the length register Lx associated with index register Ix must remain 0 or be returned to 0. Pity the poor 21K code developer who has to try maintaining C code where the base and length registers are unintentionally left modified by an interrupt service routine that is infrequently invoked!

PASSING PARAMETERS

Both registers and the C-stack are used for parameter passing on the 68K and 21K processors. One register is typically designated for returning values from a function, D0 (68K) and R0 (21K), with occasional assistance from other registers.

With the limited number of 68K registers available, parameters are typically passed to subroutines by pushing them onto the C-stack above the return address. By contrast, the first three subroutine parameters are passed via 21K data registersýR4, R8, and R12.

Even pointer values (e.g., int * pt) are passed through the data registers. This can invoke a string of error messages from the 21K. The 21K registers canýt be used for both address and data purposes as many RISC general registers can. The 21K pointer value must be moved from the data register parameter into a (volatile) index register. Even with this complication, passing parameters via registers still saves considerable time over putting things on and off an external memory stack. As stated earlier, Iýll ignore the complications arising from situations where subroutines call other subroutines.

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