THE MAGAZINE FOR COMPUTER APPLICATIONS
Circuit Cellar Online offers articles illustrating creative solutions
and unique applications through complete projects, practical
tutorials, and useful design techniques.

DESIGNING WITH THE MMC2107

by David Gonzales

Start ý System Overview ý On-Chip Memory Arrays ý Receiving and Servicing Real-Time Interrupts ý Asynchronous and Synchronous Communication ý Measuring, Timing, Creating ý Collecting Analog Information ý System Features ý Sources and PDF

ON-CHIP MEMORY ARRAYS

An embedded microcontroller ideally has enough on-chip memory for the application. This reduces system component count, power consumption, and electromagnetic interference as a result of toggling board signal traces, not to mention overall system cost. SRAM is used for temporary program execution and variable storage, and on-chip flash memory is used for permanent storage. Peripherals are memory-mapped to specific addresses so they are easily accessible by load-and-store opcodes in the instruction set.

The MMC2107 has 8-KB SRAM with standby voltage support for low-power applications. When the chip is powered down, the contents of the SRAM array are maintained by the standby power supply, VSTBY. If the standby voltage falls below the minimum required voltage, the SRAM contents may be corrupted. The SRAM automatically switches to standby operation with no loss of data when the voltage on V_DD is below the voltage on VSTBY. In Standby mode, the SRAM does not respond to any bus cycles.

Flash memory is primarily used to store program instructions and data. When power is removed from the device, it retains the stored charge of the isolated elements, making it ideal for saving system configuration parameters. The MMC2107 includes 128 KB of flash memory implemented in eight array blocks of 16 KB each. Each array block can be independently erased, protected from program and erasure, and have its address attributes restricted. To improve program performance, the flash memory controller can program up to eight unique 64-byte pages simultaneously in eight separate array blocks. These 64 bytes are aligned to the low-order addresses to form a program page buffer. The flash memory can be read, programmed, and erased using a single external V_PP programming voltage supply, thus minimizing the external components required for its support.

PREVIOUS • NEXT