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by David Gonzales
Start ý System
Overview ý On-Chip Memory Arrays ý
Receiving and Servicing Real-Time Interrupts
ý Asynchronous and Synchronous Communication
ý Measuring, Timing, Creating ý Collecting
Analog Information ý System Features
ý Sources and PDF
SYSTEM FEATURES
Other considerations can increase the
reliability of your system and help increase the battery life in portable
applications. For example, if your application operates in harsh environments,
the circuitry may periodically receive high voltages or mechanical
shock that may cause your system to stall or get lost. A watchdog
timer helps your application program continue to operate properly.
System reset, power management, external
memory interface, and debugging are also important functions. There
are six sources of reset including power-on reset, external reset,
software reset, loss of clock reset, loss of PLL lock reset, and watchdog
timer reset. There are three low-power modes of operation, which allow
powering down particular peripherals until an interrupt service from
the peripheral is required. A programmable on-chip PLL permits the
system frequency to be scaled dynamically.
A full 32-bit external bidirectional
data bus with a 23-bit address bus and four chip select signals provides
an interface to external memories or circuits. If the external bus
is not needed, the pins may be used as general-purpose I/O lines.
Having a host of resources on a single
chip reduces visibility of their interaction with the processor, so
some sort of debug hooks are needed to help designers during hardware/software
integration. A JTAG interface to a OnCE debug port provides source
level debugging and direct access to all on-chip resources in your
application. Internal bus activity may be brought out via a show cycle
mode for direct hookup to your Tektronix or Agilent logic analyzer.
Software development tools are available from Metrowerks and Wind
River Systems that permit C/C++ coding and debugging of application
programs.
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