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A COMPARISON OF MICROCONTROLLERS AND DSPs

A Case Study
by Jerry Horn

Start ý Fine Tuning ý Turn Up the Volume ý Timing is Everything ý Storage ý Pricing ý Encore ý Sources and PDF

TIMING IS EVERYTHING

First, the sample-to-sample time of the ADC must be precise to within one instruction period. If the microprocessor triggers the ADC to go into the hold mode, it must do so at a periodic rate that is exactly 31.250 ýs (for a 32-kHz conversion rate). If this signal is off by even one instruction from sample-to-sample, the signal-to-noise ratio will fall to 68 dB (with a 50-MHz clock and a 3-kHz full-scale input signal), or about 11 bits of performance. Although you can debate the actual performance relative to a "real-world" guitar signal, the main point remains that the conversion rate of the ADC must be precise.

It may be remotely possible to code the software within the SX28AC so carefully that an ADC, such as Burr-Brownýs ADS8320, could be used for this application. Unfortunately this device is not intended for audio applications and is expensive compared to audio ADCs. And, the sample-to-sample period also applies to the latch signal supplied to the DAC.

A second issue with the ADC is the method of operation. In the case of the DAC, it is possible to clock out the digital word quickly and update the analog output by latching the DAC. However, the ADC must have a clock that allows each bit to settle during the conversion process. For example, the ADS8320 requires a clock with a 500-ns period. Fortunately, this clock does not have to be as precise (in time) as the sampling signal. So, if the conversion clock varies a few clock cycles, it is acceptable.

Burr-Brown has followed up the ADS8320 with some 16-bit ADCs that contain an internal clock, which removes the conversion clock issue. You simply get the most recent result from the ADC, trigger it for the next conversion, and move on. Unfortunately, these units are multi-channel, larger, and more expensive than the ADS8320. Other manufacturers offer similar devices, however, price remains the main issue along with the strict requirement for going into the hold mode (at the start of the conversion process) at a precise point in time relative to the last conversion.

Another option is to use external glue logic to drive the ADC, as well as to interface between the ADC and the microcontroller (so that the ADC result is there when needed). The glue logic might also encompass the microcontroller to DAC interface. Still, this adds to the amount of money and design time needed. At a minimum, the requirement would be a number of standard 74x devices, although it might be preferable to use a CPLD or a small FPGA.

Using glue logic could also result in being able to use cheaper audio ADCs and DACs. Audio delta-sigma ADCs and DACs are inexpensive and high performance for the price, however, they must be operated by a low-jitter high-frequency clock. Universally, they are also serial devices, which support a limited set of serial interface standards, with the most popular being IIS (or I2S for Inter IC Sound). A CPLD would probably be required. A small FPGA might allow interfacing to an AC ý97 codec, which provides a large number of features that could be useful in this application (at the very least, it is a cheap audio device providing a stereo ADC and a stereo DAC for under $2).

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