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EXCALIBUR MARKS THE SPOT

by Tom Cantrell

Start ı Soft Machines ı Roots ı GNU Wave ı Price is Right ı Sources and PDF

I suspect the recent announcement of Alteraıs Excalibur initiative is going to cause quite a stir. On the surface, itıs just the latest round in the battle for FPGA supremacy with archrival Xilinx. But, the ultimate impact of Excalibur goes much further than a zero-sum, divvying up of FPGA market share. Excalibur may represent the start of a true paradigm shift (a phrase I donıt take lightly) for embedded system designers.

CUTTING EDGE

The fundamental premise of the Excalibur concept is the combination of RISC CPU cores with Altera FPGAs.

However, combining a CPU core with programmable logic isnıt new. Triscend and Atmel already offer such devices, and others are in the works. For example, a new start-up, Chameleon, will soon introduce a hybrid programmable logic chip for communication applications incorporating the ARC core.

In the long-term, I expect great success for CPU and FPGA hybrids. They enable small customers and low-volume applications to exploit todayıs System-on-a-Chip capabilities of silicon without the hassle and risk of going to an ASIC.

Nevertheless, market acceptance is still in its infancy and there have been growing pains. Case in point: Motorolaıs planned Core-plus hybrid never got beyond the press release stage.

What seems clear is that both the CPU and the FPGA must pass muster with customers for a CPU and FPGA hybrid to have a chance. For example, if half the designers like your FPGA and the other half like your CPU, only a quarter will like your combination, and the numbers can get real small real quick.

Needless to say, as co-dominator of the FPGA market (sharing the limelight with Xilinx), Altera has that side of the equation solved, achieving instant credibility. To maximize exposure and acceptance on the CPU-side, Altera has announced that theyıre going with stalwarts MIPS and ARM. Thereıs little doubt that Alteraıs announcement provided plenty of water cooler chat at Triscend, which just announced their long-awaited ARM-based hybrid.

The MIPS and ARM cores, like those from Triscend and Atmel, are hard (i.e., the die is comprised of a hardwired CPU sitting next to an FPGA). But, Altera has a third core in their Excalibur quiver that, unlike all the others, is soft (i.e., runs in a standard APEX FPGA).

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