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Testing Problem Parts
by George
Martin
Start ı A
Good Deal ı The Mystery Unfolds ı Postmortem
ı Sources and PDF
THE MYSTERY UNFOLDS
I know Iım leaving out a lot of details,
but they are not part of the mystery. The timing for the memory access
is one clock period. At 9 MHz, 111 ns is the time that must be met.
As you read on, youıll see other clock speeds mentioned, but nominally
9 MHz is OK. Let me get a little more detailed in my discussion. The
micro outputs address lines for about one clock period and then activates
a read for the second clock period. The timing requirement is for
the address signals and the READ signal to get through the PAL and
through the memory so that memory data is available to the micro in
time. The PAL adds a delay in producing its decoded output (about
5ı10 ns).
The design uses 27C512 devices. There
are two speeds for access time devices in my customerıs inventory,
90 and 120 ns. Well, hereıs where the mystery comes in, the 120-ns
part works and the 90-ns device does not! I know thatıs backwards,
but Iım looking at the devices as we speak.
If I connected the scope to the READ
signal from the micro and looked at the data lines coming out of the
EPROM, Iıd have a good overall picture of whatıs going on. Thatıs
exactly what I did, I measured the READ signal, which goes low in
about 20 ns. The board was probably loading the signal and thatıs
why the EPROM was slowing down (see Photo 1).
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| Photo 1ıThis is what I measure
as fall time. Iım measuring from 5 V at ı10% to 0 V at 10% as
indicated by the markers. |
I chased that topic around for a few
hours until my customer sent his 500-MHz scope pictures (see Figure
1). The rounding in the signal was just at the limit of my 150-MHz
scope. Time to get a better one. Perhaps Priceline handles them!
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| Figure 1ıLooking at his graphs,
I then could see what conversations with my customer had not
yet conveyed. |
After seeing this, Iım not so sure itıs
a signal-loading problem.
It was interesting that as soon as we
traded pictures, everything became clear. Also, my customerıs new
scope has a built-in output converter. I, on the other hand, took
my pictures with a digital camera. Thatıs sort of a roundabout way
to do it, but it works. Keep this in mind when youıre trying to explain
a difficult problem.
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| Photo 2ıHere is a 120-ns device
generating output in 60ı80 ns. This unit is running out of EPROM
(120-ns device). Note when data is going active (about 60 ns)
and when it appears to be stable at 90 ns. |
If you look at Photo 2, youıll see a
120-ns EPROM producing valid data at about 60 to 80 ns. And, Photo
3 shows you a 90-ns EPROM producing data at about 100 to 120 ns. To
get the results you see in Photo 3, I changed the state of ready in
the hardware so that three or four wait states were inserted.
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| Photo 3ıThis photo shows a
90-ns device generating output in 120 to 150 ns. This shows
one of the bad units with the EPROM (90-ns device). Note that
data does not reach the final values in time. |
When we took a closer look at the pictures,
it seemed as if the device was mismarked. So, I asked him when the
parts were purchased. The 120-ns device was purchased five years ago,
and the 90-ns device was bought last year. Remember last year when
you couldnıt get any memory devices no matter how hard you tried?
Yet these 90-ns devices magically appeared. Hmmı.
My two days were up. The boards with
problems could be made workable with a 120-ns device. So, my customer
plans to get a newer EPROM now that itıs available. We never concluded
exactly what the problem was; I donıt believe we ever will. The number
of bad units represented a small percent of the build. Units in the
field have never been a problem. No returns! So we gave up and called
it a day.
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