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THROUGH THE LOOKING GLASS

Taking a Look at the PIC18Cxxx Series
by David Brobst

Start ý PIC18Cxxx Chips ý Memory ý Data Memory ý Advanced Indirect Addressing ý Deep and Accessible Stack ý Interrupts ý Power-On Features ý Clock Speed ý 10-Bit A/D ý Hardware Multiplier ý Timers ý CCP/PWM ý USART ý I²C Master ý Table Read/Write ý Current Status ý Sources and PDF

TIMERS

The PIC18Cxxx has added four timers. Each of these timers can be configured as 16-bit timers with numerous post-scaler and pre-scaler options.

One of the long-standing issues with the low- and mid-range PIC devices is the sharing of a pre-/post-scaler between TMR0 and the watchdog timer. By assigning the scaler to one peripheral, the other peripheral is left high and dry and finds itself bereft of a scaler of any type. This means that, if the scaler is assigned to the watchdog timer, TMR0 will find itself flying along at a 1:1 ratio with the instruction clock. This often makes the two peripherals mutually exclusive at worst, or a hodgepodge of scaler switching at best. The PIC18Cxxx rectifies this long-standing problem by giving the WDT its own post-scaler.

Now for the bad news. Unfortunately, the WDT post-scaler is found in the configuration fuses and can only be set once during programming. After set, it cannot be reliably changed for all instances. However, even with the post-scaler in the configuration fuses, the WDT/TMR0 combination in the PIC18Cxxx is a vast improvement over the kludge that proceeded it in the low- and mid-range devices.

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