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THROUGH THE LOOKING GLASS

Taking a Look at the PIC18Cxxx Series
by David Brobst

Start ý PIC18Cxxx Chips ý Memory ý Data Memory ý Advanced Indirect Addressing ý Deep and Accessible Stack ý Interrupts ý Power-On Features ý Clock Speed ý 10-Bit A/D ý Hardware Multiplier ý Timers ý CCP/PWM ý USART ý I²C Master ý Table Read/Write ý Current Status ý Sources and PDF

DATA MEMORY

Iýd like to review the details of some of the new peripherals or improvements on mid-range features available with the new PIC18Cxxx architecture. Both the good and the not-so-good will be discussed in this section.

Data memory was discussed briefly before, however, I would like to look at some of the unique features of the memory. Figure 3 shows the data memory of the PIC18C452. Although there are 1536 bytes of memory, they are set up in a paged manner. Each page of data memory is 256 bytes, and the special function registers (registers that set up the peripherals) can be directly accessed without paging. So for many cases, the paging might not be a problem. However, the front page of the PIC18Cxx2 datasheet states a linear data memory space.

The memory is arranged in the memory map linearly, but accessing all of it directly still takes banking operations. This has been one of the major frustrations for all manufacturers with the entire line of microcontrollers. But with current design tradeoffs, it is hard to see how the paging could be eliminated without making the instruction bus too large and expensive.

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