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Taking a Look at the PIC18Cxxx Series
by David Brobst
Start ý PIC18Cxxx
Chips ý Memory ý Data
Memory ý Advanced Indirect Addressing
ý Deep and Accessible Stack ý Interrupts
ý Power-On Features ý Clock
Speed ý 10-Bit A/D ý Hardware
Multiplier ý Timers ý CCP/PWM
ý USART ý I2C
Master ý Table Read/Write ý Current
Status ý Sources and PDF
CLOCK SPEED
The PIC18Cxxx family has a built-in
PLL circuit that multiplies the internal instruction clock by four
to generate the internal instruction clock. With the PIC architecture,
this means 10-MIPS performance is available when running off of a
system clock of 10 MHz. Unfortunately, the PLL is not rated to run
with a clock faster than the 10 MHz. So, while the 10-MIPS performance
is a sizable improvement over the maximum speed of earlier processors,
it is not a quantum leap from the 5-MIPS performance of the mid-range
devices.
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