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MAKE THE SMARTPIC SERIAL PROGRAMMER


Circuit Cellar Online
THE MAGAZINE FOR COMPUTER APPLICATIONS
Circuit Cellar Online offers articles illustrating creative solutions
and unique applications through complete projects, practical
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MAKE THE SMARTPIC SERIAL PROGRAMMER

Lessons from the Trenches by Duane Perkins

Start ý Commands and Response Codes ý The Electronics ý Construction ý Housing the Programmer ý Sources and PDF

PIC microcontrollers have become popular because of their speed, versatility, and low cost. There are now so many different types that it's becoming hard to keep track of them, and new types are being offered all the time. One thing they all have in common is the requirement for a programmer because program and configuration memory is contained in the chip. Many PIC programmers on the market are limited with regards to the types they will program. The less costly the programmer, the less versatile it is.

The PIC16Cxx programmer described here is a smart programmer for any serial programmed PIC with a 14-bit instruction word, including the PIC14000 with an adapter for the target socket (not PIC16C5x or PIC17Cxx devices). It requires a master program running on any computer with an RS-232 serial port configured for 9600 bps, 8-bit word, one stop bit, and no parity. The programmer acts as a DCE slave device that communicates with the computer acting as a DTE device. 16CxxPRG.EXE is a master program for IBM-compatible PCs. See the 16CxxPRG model A userýs manual for details.

SMART FEATURES

The programmer contains an embedded PIC16C71 microcontroller (a PIC16C61 or PIC16C84 will also work) that is programmed to communicate with a master program via asynchronous serial I/O at 9600 bps. Most of the smart features are invoked by the way it communicates with the master program, including hardware handshaking. The master program must act on these signals in an appropriate manner in order to realize their full potential.

When the programmer is connected to an active serial port, it is held in a reset state until DTR is asserted. Once DTR is asserted, it waits for the computer to assert RTS. Once RTS is asserted, it asserts CTS and waits for a command. When a command is received, it returns a transmission error code if a transmission error occurred, or an invalid command error code if it does not recognize the command. If the command is recognized, it either returns a response immediately and waits for further input, or performs the function specified by the command and returns a response. The master program can abort any function at any time by dropping DTR.

One command tells the programmer to identify itself. It responds with an ASCII "A", which is its model designation. The master program should always check to be sure it is communicating with a model A programmer, because a later model (which could be developed) will probably not work correctly.

The programmer has two sockets for target devices. When told to accept user program and EEPROM data size parameters, the programmer tests to see if a device is in either target socket. If no device or two devices are found, the programmer responds with an error code.

VPP will be applied to the target sockets only when a command is received that tells the programmer to read or program a target device. VPP cannot be applied unless VDD is applied. VDD will be applied prior to VPP and when testing for devices in the target sockets.

When commanded to read or program a target device, no voltages are applied to the target sockets until the master program drops RTS. No voltages are applied to the target sockets when the programmer is powered up, even if it is not connected. It is safe to put a device into either or both sockets at any time. Note: VDD is actually at about 0.5 V when not applied. A target device will not be harmed by this low voltage and it can be safely grounded.

There are three possible levels for VDDý4.5, 5.2, or 5.5 V. The master program can set the level high (5.5 V) or low (4.5 V) for reading. The level is automatically set to 5.2 V when programming in conformance with Microchip specifications that require VDD to be in the range of 4.75 to 5.25 V. The VDD levels may deviate slightly from those nominal voltages but will be within the limits of Microchipýs minimum and maximum specifications.

Hardware handshaking coordinates the computer and the programmer during transfer of data in either direction. The programmer utilizes half-duplex, interrupt-driven serial I/O with a one-character buffer and will accept a character from the computer only when it has asserted CTS. The programmer waits until RTS is asserted (up to 2.3 s) before sending a character. There are no unnecessary delays while the computer or programmer is marking time to give the other time to perform its task.

When programming a non-EEPROM device, words expected to remain blank in either the user program memory or configuration memory are not programmed or verified. The master program can abort the programming of user program memory when all remaining words are to remain blank, saving the time that would otherwise be wasted. The master program should verify the device after programming to be sure that there are no nonblank words where there should be none. When programming an EEPROM device, all of the program memory is programmed to assure that unused words are erased. EEPROM data memory (if any) is always fully programmed and verified.

A device type code can be programmed into configuration memory at 2008h. This word can be left blank by programming it as 3FFFh. When a device is read, the configuration memory can be read first, including the device type code. The master program can then establish the device parameters based on the type code before reading user program memory.

The programmer can read or program up to 31.75 KB of words of user program memory. The programmer can also read or program up to 510 bytes of EEPROM data memory even if the program memory is not EEPROM. In the event that Microchip develops such a device, the programmer can handle it. The programmer can read and program a device ID at 2000h to 2003h. The master program should limit the ID to four ASCII bytes no greater than 7Fh. All higher-order bits of the word should be 1s.

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