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MAKE THE SMARTPIC SERIAL PROGRAMMER

by Duane Perkins

Start ý Commands and Response Codes ý The Electronics ý Construction ý Housing the Programmer ý Sources and PDF

THE ELECTRONICS

Figure 1 shows the schematic diagram for the programmer. External power of 12.6 VAC or 18 VDC is supplied at J1. A bridge rectifier converts this to 17 VDC, which is filtered by C1. VR1 supplies 5 V to U1, U2, and other parts as shown. VR2 has three 1N914 diodes connected in series between its ground terminal and ground, which are supplied with current from R16. The output of this 12-V regulator is at 13.8 V because its ground terminal is held at 1.8 V above ground. VR2 supplies U3, Q5, K1, and other parts as shown.

(Click here for figure)

Figure 1ýThe upper half of the schematic is the digital circuit. The lower half is the voltage control circuit.

U3 sets the V_DD level for the target sockets by establishing the voltage at the base of Q5. The actual V_DD level may deviate slightly from the nominal voltages that are stated in Figure 1. U3A has a reference voltage of 5 V at its noninverting pin. U3B has a reference voltage of 6.05 V (the zener voltage of D5 at low current) if K1 is energized, or 5.8 V if K1 is not energized.

The outputs of U3 are applied to the base of Q5 through D13, D15, and R12. Whichever output is higher will determine the V_DD level at the emitter of Q5. There is a drop of about 0.6 V across the base-emitter junction of Q5 and also across D14, which holds the inverting inputs of U3 at approximately the voltage at the base of Q5, thus applying 100% negative feedback. C6, C15, and C16 prevent oscillation.

When V_DD is applied, RA0 is low and Q3 is cut off. When RB4 is low, Q2 is cut off, and the V_DD level is high. If RB7 is low, Q1 is cut off and K1 is not energized. If RB7 is high, Q1 conducts, energizing K1, which in turn shorts D6. The output of U3B will be higher than the output of U3A, thus D13 will not conduct. Due to negative feedback, U3B will drive the base of Q5 to a voltage approximately equal to the reference voltage at its noninverting input and the emitter of Q5 will be about 0.6 V lower (5.2 or 5.5 V).

When RB4 is high, Q2 conducts. R9 pulls the noninverting input of U3B below 5 V, with the result being that its output is below the output of U3A and D15 does not conduct. Negative feedback forces the base of Q5 to about 5.1 V and the emitter of Q5 to 4.5 V. When RA0 is high, Q3 conducts, pulling the base of Q5 to less than 0.5 V, thus cutting off Q5. Current through R11 and D14 is shunted through D7, holding V_DD to about 0.5 V.

V_PP is controlled by Q6. When both RA0 and RA1 are low, Q4 is cut off. 13.8 V is applied to the base of Q6 through R17, resulting in 13.2 V at the emitter. When either RA0 or RA1 is high, Q4 conducts, cutting off Q6. R18 limits V_PP current to prevent target device latch-up.

U2 converts the TTL-level signals from U1 to RS-232 levels for the serial port lines. The positive voltage generated by the MAX232 is connected directly to the DSR line to signal that the programmer is powered. DTR is connected to DCD and, via R1 and D12, to the NOT-MLCR pin of U1.

When DTR is asserted, D12 does not conduct and 5 V is applied to NOT-MCLR by R3, allowing the PIC16C71 to operate. When DTR is dropped, it is negative and sinks current through R1, D12, and R3, dropping the voltage on NOT-MCLR to ground level, thus holding the PIC16C71 in a reset state. D11 assures that the voltage on NOT-MCLR cannot be negative by holding its cathode and that of D12 at 0.6 V below ground level.

Because the programmer is wired DCE, it sees TX as its data input line, RX as its data output line, RTS as a control input, and CTS as a control output. The master program can determine if the programmer is connected, powered or not, by testing to see if DCD follows DTR. The master program can determine if the programmer is active by checking to see if CTS follows RTS.

U1 acts as a slave that responds to valid commands from the computer. It controls the voltages applied to the target sockets and the data and clock signals required to read or program a PIC16Cxx. Via D8, D9, and D10, it determines which sockets contain a target device.

V_DD is applied, followed by a high on OSC1 from RA2 through D10. RB2 and RB3 are inputs with weak pull-ups enabled. If either is pulled low through D8 or D9, a device is in the respective socket. If the device is configured for a RC oscillator (which is the case for a blank device), OSC2 will be low. If the device is not blank and is not configured for a RC oscillator, an internal inverter outputs the inverse of OSC1 on OSC2, pulling it low. After reading or programming a target device, V_PP is dropped, then after a delay of about 100 ms, to allow C18 to discharge, V_DD is dropped.

A 4-MHz crystal or ceramic resonator can be used. If a ceramic resonator with integral capacitors is used, do not use C7 and C8. The frequency must be 4 MHz to provide correct timing of various pulses and delays (assuming the PIC16C71 is programmed with 16CxxPRG.HEX).

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