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EMBED THIS PC

PART 2: Emulator and EPROM Basics
by George Martin

Start ý Making The Choice ý Getting The Debugger Going ý Putting It All Together ý Sources and PDF

Last month, I started a discussion on embedding a ý486-class machine. I defined the controller for a laser light show as a typical application, gave you several sources of background information, and investigated one particular DRAM device. Your assignment was to write up your system requirements and search through the literature for a CPU and DRAM.

When you build your system, youýll experience what it feels like to bring up your very first system. Youýre not sure if anything is correctýthe design, artwork, boards, or solderingý. In fact, the entire development process will probably have felt like the foolproof method for sculpting an elephantýyou got a huge block of marble and chipped away the things that didnýt look like an elephant.

Well, you get the picture, and youýve probably been there before. When youýre in this place, you need a plan to check out your design. Which brings us toýwhat options do you have with emulators?

EMULATOR OPTIONS

Of course, we could purchase the classic emulator that replaces the CPU and operates at full speed. Although this is the best solution both for hardware and software development, at $20,000ý50,000, the cost is high, very high.

I could write, compile, link, and locate the code, creating an image of the program that we could download into the EPROM. The EPROM is then plugged into the unit and powered up. Although this is the least expensive approach, it is perhaps the most time consuming.

These examples represent both ends of the spectrum. Either way, you spend money up front in equipment or at the end in labor. But, are there ther choices?

I could monitor the external bus signals with a logic analyzer. After capturing the bus cycles, a logic analyzer converts the bus activity into CPU instruction activity. Unfortunately, this method has a significant weakness since CPU activity is not always displayed on the bus and not necessarily at the time you expect. With instruction prefetch queues and internal memory caching, you soon realize that the external signals make little sense. Of course, I could disable some features, but then Iým not running the CPU at full speed. The cost of the logic analyzer must be taken into account.

Most highly integrated CPUs have JTAG ports, that read and write internal registers. These registers can be set to clock-cycle execute with the results being read out on the same JTAG port. It offers the classic control and observability that you want in testing devices. Because JTAG ports can perform emulation functions, a set of emulators focuses on this approach, which is called BDM (Background Debug Mode). Although this is a good choice, itýs not available on all CPUs.

An onboard monitor EPROM can be used to load and run programs, insert breakpoints, single step, and all the other features you desire in an emulator. Itýs a good choice, but I really want quick loading and a single step in the high-level language (at least C source code) that I might use. Mind you, monitor EPROMs have grown into complete solutions that include loading, single step, breakpoints, and source-level debugging. The only thing lacking is trace capability. If a monitor EPROM works, it is both low cost and easy to use.

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