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PART 2: Emulator and EPROM Basics
by George Martin

Start ı Making The Choice ı Getting The Debugger Going ı Putting It All Together ı Sources and PDF

PUTTING IT ALL TOGETHER

Now that Iıve selected a CPU, DRAM, and BIOS, Iıll try to put together a design. Take a look at the AMD ELAN SC400. You can find the schematics for the development boards at the AMD web site. The CPU comes in a 292-pin ball-grid array (BGA) package.

Iıll start by connecting the DRAM. I use OrCAD as my design-capture software, but Iım still in the 16-bit DOS version, so Iım hesitant about posting those schematics. And, unless your requirements exactly match mine, youıll be rolling your own schematics anyway. Hopefully, the AMD web site and this series will give you what you need to be able to generate your own schematics.

Let me try this approach. Table 1 illustrates the DRAM connections. Most are directly connected to the CPU, while some go through buffers. Depending on your specific application, you may not require the buffers. Remember my previous article on defects. Well, the type of mistake I tend to make is with errors in large tables of dataılike that spreadsheet. So, check my work. Donıt just copy it.

As you can see, it looks pretty straightforward. I connected two banks of DRAM (each bank is 1M x 32) to the CPU using the 1M x 16 DRAM devices I talked about earlier. This gives a total of 8 MB of DRAM.

Now, let me configure the CPU to use the DRAM. The ELAN SC400 has configuration registersılots of them! Much of the classic PC architecture is preserved 100%, so the COM0: I/O addresses are unchanged. To find places for the new registers without causing a conflict with the existing code base, AMD found a few free I/O registers using a different technique. It adopted an index register into the new register set. For example, I/O addresses 0x22 and 0x23 are the register pair used to configure DRAM. In I/O address 0x22, I write the index, and in I/O address 0x23, I write the value:

Outb(0x22, 0x00);
Outb(0x23, 0xAD);

The first instruction points the index register to index zero, while the second instruction sets the value. Index register zero is the DRAM Bank0 configuration register, and the value 0xAA does the following:

1 = Bank 0 Enabled
0 = Reserved AMD
1 = EDO type DRAM
0 = Symmetrical Addressing
1 = 32-bit DRAM interface (for speed!!!)
010 = 1-Mb deep bank

These are the values required for this particular DRAM and design. Youıll quickly notice that the CPU supports many more options than youıll ever come across in your design experience. But, itıs good to know theyıre all there.

LOOKING AHEAD

This should give you a start on your project. Next month, Iıll go further into the software, taking a closer look at the EPROM emulator and real versus protected mode.

As you poke away at your initial design, remember indecision is the key to flexibility.

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