A Guide to online information about:

LVDS
(Low Voltage Differential Signaling)

by Bob Paddock

At my day job, I had a project where I needed to scan almost 100 switches that covered a span of almost six feet.  Complicating the matter, I did not have control over the enclosure this project would end up in. Most likely it would be a wooden box with poor ventilation.

I needed a high speed technology so I would not miss multiple simultaneous switch closures when the switches where scanned, but I also needed a low-EMI technology to meet FCC part 15 guidelines (pdf), and as always the cost had to be kept low.

Traditional signaling technologies like TTL/CMOS, RS-442/423, RS-485, and PECL could not move the data fast enough while maintaining low power, noise, and cost.  I found Low Voltage Differential Signaling (LVDS) is the only signaling technology to meet all four criteria.

The key to LVDS technology is to use a differential data-transmission scheme.  Instead of designating a precise voltage level for a logic one or zero, the LVDS standard specifies a voltage differential. This approach ensures outstanding common-mode-noise immunity. Any noise introduced into the medium is seen by the receivers as common-mode modulations and is rejected. The receivers respond only to differential voltages.

It is well recognized that the benefits of balanced data transmission begin to outweigh the costs over single-ended techniques when signal transition times approach 10 ns. This represents signaling rates of about 30 Mbps or clock rates of 60 MHz (in single-edge clocking systems) and above.  LVDS, as documented in TIA/ EIA-644, can have signal transition time as short as 260 ps turning a printed circuit board trace into a transmission line in a few centimeters. Care must be taken when designing with LVDS circuits.

To achieve high data rates and keep power requirements low, LVDS uses a differential voltage swing of only 345 mV (typical, in point-to-point applications). Furthermore, the LVDS CMOS current-mode driver design greatly reduces quiescent power supply requirements.

As you can see, LVDS is a "Balanced System." A balanced signal is represented by a pair of wires where a voltage difference is used to transmit or receive binary information.

"Pericom has identified a key area for growth in the coming years - out of the need to transmit increasingly large files or data packets within systems and between systems," said Jim Feldhan, president of Semico Research. "... While there are many competing solutions appearing in the market today,  usually the simplest and most cost-effective solution is preferred. The low EMI characteristics of LVDS technology provide designers some extra margin in building high-speed connections where noise levels must be kept low."  Their LVDS family is compatible with industry standards, ANSI/TIA/EIA- 644 and IEEE 1596.3 SCI specifications.

IEEE 1596.3 is used primarily for communication between processors or grouping work stations into clusters. EIA-644 is more general-purpose, application independent, and provides a high bandwidth from higher transmission speeds with low noise and power consumption. EIA-644 is particularly well suited for interfacing high-performance video cameras for instance the DALSA MotionVision to imaging systems, such as a PC workstation coupled with a Matrox Meteor-II/Digital frame grabber.

National Semiconductor, being the first to market with LVDS parts, has had the most time to organize their LVDS information into a concise and useful format.

Their  LVDS Owner's Manual & Design Guide is intended to help designers become familiar and comfortable with the benefits and use of LVDS technology. The Owner's Manual is available either as single chapters or the entire document in PDFformat.

Evaluation boards  that demonstrate the basic operation of LVDS devices are available for a nominal charge.

Numerous application notes can be located via the LVDS Application Note Selection Guide.

National Semiconductor offers parts that can run from a 5VDC or  3.3VDC, while others offer parts that run from a predominantly 3.3VDC with 5VDC input compliance on some parts.

In the early days of LVDS technology, only point-to-point physical layer interfaces were addressed. These included intra-system connections such as printed circuit board traces and cables. Physical layer interfaces are often a critical bottleneck in any application that requires high bandwidths—telecommunications and high-speed networking, for example.  Today bus parts are becoming available.

Texas Instruments (TI) Steve Goacher said:

"More and more designers are looking to LVDS as a solution to data transmission applications requiring high speeds, low power consumption and low noise."

LOW-VOLTAGE DIFFERENTIAL SIGNALING (LVDS) DESIGN NOTES

LOW-VOLTAGE DIFFERENTIAL SIGNALING (LVDS) EVALUATION MODULE (EVM)

LVDS DEVICES OPERATE WITH VCC = 2.5 VDC

LVDS IN HARSH ENVIRONMENTS WITH THE NEXT GENERATION RECEIVERS FROM TI

LVDS MULTIDROP CONNECTIONS

PERFORMANCE OF LVDS WITH DIFFERENT CABLES

POWERING AN LVDS COM-LINK IN A 5-V SYSTEM

REDUCING ELECTROMAGNETIC INTERFERENCE WITH LOW-VOLTAGE DIFFERENTIAL SIGNALING

SKEW DEFINITIONS

SLEW RATE CONTROL OF LVDS CIRCUITS

USING AN LVDS RECEIVER WITH RS-422 DATA

LVDS and LVDM General Purpose Family - Parametric Table

Evaluation Modules from TI

LVDS and LVDM General Purpose Family - Device Listing from TI
 

Recently, LVDS devices capable of working in Bus Configurations have come to market.

Bus LVDS (BLVDS) is a new family of bus interface circuits from National Semiconductor,  based on LVDS technology specifically addressing multipoint cable or backplane applications. It differs from standard LVDS by providing increased drive current to handle double terminations that are required in multipoint applications.

You can reduce cost of a product by reducing the number of interconnections between boards. To this end, both National Semiconductor and TI offer LVDS Serializer/Deserializer chipsets.
 
 

Bus LVDS SER/DES FAQs Frequently Asked Questions (and Answers) on the Serializer/Deserializer Bus LVDS chipsets from National Semiconductor.

Flat Panel Displays with LVDS Interfaces are starting to come to market.

CHAMP 0.8 mm High Density Cable Assemblies from Amp
are designed to meet the needs of the next generation SCSI interfaces (such as Fast-20 Ultra-SCSI); the new Low Voltage Differential Signal (LVDS) technologies (such as the Scalable Coherent Interface [SCI]); and QuickRing which use shielded differential pair cable constructions. Typical cable assembly applications move from the desktop or home computer with interconnections going to various peripherals and, in the office environment, to hubs, routers, and servers.

DS2118M Ultra2 LVD/SE Multimode SCSI Terminator provides termination for the emerging Low Voltage Differential (LVD) Ultra2 SCSI specifications. 

As rise and fall times become faster in order to achieve high operating speeds, transmission line effects on PCBs can be very significant, with the possibility of unpredictable behavior. This note presents a guideline when to analyze, discusses the characteristics of different types of PCB trace, describes Lattice Diagram and Bergeron Plot analysis, and summarizes termination methods. Includes 10 worked examples.

You should also consider AN1061: Reflecting on Transmission Line Effects, to be on your required reading list.  Alas, it is not available online, but you can order it online.  They will send it to you in "oil-based toner on flattened dead trees" format.

National Semiconductor offers their Transmission Line RAPIDESIGNER.

In these Resource Pages, I always like to see what I can find about how our Tax Dollars are being put to use for the subjects at hand.  It also leaves me to wonder at times if the Men In Black are going to show up to ask about how I found this information, which in general comes from the standard search engines, as at times it seems a bit odd.

NASA - Test Summary for the National LVDS Line Drivers and Receivers

LVDS DS90C031 Heavy Ion SEL Test
Brookhaven National Labs
September, 1999

TI SN65LVDS31D Heavy Ion SEL Test
Brookhaven National Labs
September, 1999

The NASA/GSFC Radiation Effects and Analysis section perform testing and analysis investigating the effects of radiation on electronics and photonics.

Tutorials for Programmable Logic and Military/Aerospace Systems:

• Military and Aerospace Systems
• Radiation_Definitions
• Radiation_Introduction
• Single Event Upset (SEU)
• Single Event Latchup
• Other Single Event Effects
• How Single Event Effects Testing is Done
• Notes on Radiation Shielding

If you don't want to do your own Radiation testing, you can get Radhard LVDS parts from UTMC Microelectronic Systems Inc.

Standards For Protection Against Radiation.
 

The web site of the Computing Division's Electronic Systems Engineering (ESE) department, located on the third floor of the Feynman Computing Center at the Fermi National Accelerator Laboratory in Batavia, Illinois, shows a real world application of LVDS in their VRB Fanout Module, complete with schematics and assembly details.