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TWENTY YEARS AGO, TODAY

by Tom Cantrell

Start ı Big Bang DSP ı Compiler is King? ı Once More, With Feeling ı Sources and PDF

BIG BANG DSP

Those of you who subscribe to the hard-copy version of Circuit Cellar already know a bit about StarCore, the brand new DSP architecture jointly developed by heavyweights, Lucent and Motorola (see "DSP Doings" in Circuit Cellar 109).

To refresh, it was in June of 1998 when the alliance was first announced, and just about a year ago that the team disclosed the initial technical details of the SC140 core.

This is an interesting deal from many angles. On the business front, the premise is simple enoughıcombine the forces of the number two and number three DSP suppliers to go after number one, TI (see Figure 2). Yet StarCore isnıt a full-fledged spinoff (As far as I can tell, the staff members remain employees of their respective companies.), but is more than a mere collaboration with, for example, a completely separate facility in Atlanta, Georgia.

Figure 2ıMotorola and Lucent didnıt need a DSP to figure out that number two plus number three is greater than number one, and the StarCore joint venture was the result.

Though developing the core jointly, each partner will use it to develop their own chips, even as both companies get cross-licenses for the others existing DSPs (the Motorola 56k and Lucent ı16x, respectively). In addition, Lucent gets a license to Motorolaıs M-Core embedded RISC, itself a bit of a skunk works project within Motorola.

In addition to the core itself, StarCore is responsible for delivering the tools (i.e., compilers, ect.). At the same time, theyıre supporting third-party tool suppliers, such as Green Hills. Furthermore, like M-Core, StarCore is purportedly available for licensing by other chip suppliers, although, to the best of my knowledge, no such deals have been announced.

Technically, StarCore (see Figure 3) finesses a whizzy-yet-practical take on the VLIW concept, which witnessing the success of the TI ıC6X, and now with the blessings of Intel with Merced (a.k.a., ıItanium), it is clearly the heir apparent to superscalar for performance-at-any-price processors.

(Click here for figure)

Figure 3ıStarCore is a silicon black hole that swallows signals at up to 4.8 GBps.

As important as the architectural rocket science, the implementation addresses pragmatic issues, such as no one wants to carry around a cell phone that needs a car battery. Clever logic design like activity-driven distributed decoding, combined with the latest low-voltage process, remarkably cuts power consumption to less than 1 mW per MHz at a mere 0.9 V. Meanwhile, 16-bit instructions (packed into 128-bit long instruction words) offer the promise of reasonable code density.

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