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AN INTRODUCTION TO VHDL

Designing Hardware with Software

by James Antonakos

Start ý Levels of Design ý The Interface ý The Body ý Full_Adder ý Half _Adder ý Identifiers, Data Types, and Operators ý Examples ý The Five-Input AND Gate ý The 2:4 Decoder ý Timing Examples ý Other Methods ý Sources and PDF

This month, letýs take a look at a different method of designing a digital circuit. Instead of connecting integrated circuits together with wires on a breadboard, Iýll describe (using plain text) and simulate the circuit via software. This design method uses very-high-speed integrated circuit (VHSIC) hardware description language (VHDL).

WHAT IS VHDL?

VHDL is a technique for describing the hardware associated with a digital system. The VHDL design (also called a model) is similar to the structure of an ordinary program, such as a C program. The C program is compiled to make an executable file, whereas the VHDL design is simulated to test the validity of the hardware design. These processes are illustrated in Figure 1.

Figure 1ýCompiling a C program versus simulation of a VHDL model is demonstrated here.

Why bother learning how to write a VHDL specification for a digital circuit if you are already familiar with the techniques of digital design? Consider the benefits. As in Electronics Workbench, the hardware in a VHDL model is simulated, which means it is not necessary to build the circuit from actual components to see if it works. Also, after the VHDL model has been created, it is easy to transfer it to other environments. For example, two designers working in different cities can e-mail the VHDL model of their circuit to each other, a faster and easier method than sending a bulky hardware prototype through the mail. In addition, the standardization of VHDL by the IEEE (standards 1076-1987 and 1076-1993, also called VHDL-87 and VHDL-93) guarantees that a VHDL model is portable, so the same model can be processed by any VHDL-87/93-compliant package.

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