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WHAT'S YOUR ENGINEERING QUOTIENT?

Problem 7—Engineer Lori designed and built a protocol converter using a Zilog Z80-compatible Z182 communication processor combined with a 256K ý 8 flash memory and a 512K ý 8 CMOS SRAM.

The prototype was tested for ESD hardness by placing it on an aluminum plate and creating electrostatic discharges of up to 10 KV at various points around the unit with a human body model electrostatic discharge generator. Software was run during the test which filled RAM with known values then continuously validated memory contents while exercising the communication channels.

Lori found that the test software would crash or fail randomly in one out of 10 discharges, and that the problem occurred a bit more frequently at 5 KV than at 10 KV. RAM contents were never altered by the failure. Which components or circuits should Lori suspect first?

The data bus would be the most likely suspect since a disruption on the bus would only cause a problem during the short time data is being transferred. The address bus or control lines could also be a source of the problem. Lori should check return paths through both ground and V_CC, check for proper bus termination at both ends and look for parasitic capacitive coupling to the enclosure and mechanical components.

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