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VIM: A POWERFUL NEW MEZZANINE

by Rodger Hosking

Start ý Design Rationale ý VIM Streaming Parallel Bus ý Serial Ports ý Power Supply ý Single-Slot VIM-Based Systems ý Sources and PDF

One of the toughest obstacles faced by designers of embedded real-time systems comes from the same new technology that fuels this fast-moving industry. Our insatiable demand for more powerful, smaller, and less expensive processors and peripherals has driven the wizards of silicon to produce generation after generation of increasingly faster devices. However, system infrastructures for connecting these devices to each other and to real world peripherals have not kept pace with the data transfer demands of these new devices. As a result, overall system performance often suffers more from bottlenecks in interconnections than from device speeds (see the "New Processors" sidebar).

Several factors have exaggerated this problem in open-architecture board-level embedded systems. The role of the backplane in these systems is shifting from its traditional task of providing a data-flow channel between boards to that of handling control, status, and initialization tasks. Even though some newer high-speed backplane technologies are emerging, the concept of arbitrating for a common bus shared across multiple boards proves limiting in the more demanding applications. As a result, alternate techniques for moving data across the backplane, such as RACEway, have grown in acceptanceýnotwithstanding the cost of implementation and packaging, which can be significant.

One of the most traditional methods of delivering dedicated high-speed interconnects between boards, is the mezzanine or daughterboard. Over the years, dozens of mezzanine architectures have evolved. Most of them were inspired by specific needs of a particular product or manufacturer, and therefore remained obscure company-proprietary designs. However, after years of use, refinement, definition, and numerous committee meetings, a few mezzanine designs have evolved into true industry standards. Unfortunately, the most popular standard mezzanine busses still fall far short of meeting the needs of recently introduced DSP and RISC processors (see the "Comparing Mezzanine Designs" sidebar).

To close this I/O gap, Pentek developed the VIM (velocity interface mezzanine) architecture, a high-performance mezzanine bus delivering high-speed data transfers suitable for a variety of processors and board formats.

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