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HIGH-TEMPERATURE ELECTRONIC DESIGN

Part 1: What Are Your Options?
by George Novacek

Start ý A Little Theory ý Size and Type ý Silicon Bipolar Transistors ý Silicon MOSFETs ý Six of Oneý ý SOI Technology ý Other Operation Problems ý Sources and PDF

SOI TECHNOLOGY

The SOI wafer is similar to the bulk MOSFET, but it also comprises a thin silicon layer over a thick buried oxide (BOX) on a bulk silicon substrate. Looking at Figure 4, you can envision it as small junction areas similar to the structure of the P-channel device located within the BOX, as opposed to the substrate. Figure 6 shows the actual cross section of the bulk and SOI devices for comparison. The substrate is now at the bottom side of the BOX. The result is a greatly reduced junction area with all its benefits.

Figure 6ýThe actual cross section of SOI and bulk type MOSFETs can be seen here.

The available SOI devices have been mostly optimized for 300ýC operation. Their original application was for the radiation hardened devices, which also require the smaller junction area. High-temperature operation came as a fringe benefit. Another benefit of the smaller junction area is that the junction capacitance has been significantly reduced, and therefore, power consumption has decreased. The SOI technology has extended to analog devices, too. Operational amplifiers built with SOI devices have successfully passed tests for 1000 h of operation at 300ýC.

Although the silicon-based technologies do not give us the great results that exotic ones do, their major advantage is that they can be used with the existing wafer manufacturing equipment worth billions of dollars worldwide. Until a similar industrial base is developed for the new technologies, they will, by necessity, play second fiddle.

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