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The eZ80 Webserver


Circuit Cellar Online
THE MAGAZINE FOR COMPUTER APPLICATIONS
Circuit Cellar Online offers articles illustrating creative solutions
and unique applications through complete projects, practical
tutorials, and useful design techniques.

THE eZ80 WEBSERVER

Technically Speaking An 8-Bit CPU Takes on the Internet

by James Antonakos

Start ý Software Model ý Memory Map ý Instruction Set ý On-Chip Peripheral Registers ý Hardware Architecture ý TCP/IP Stack Operation ý eZ80 Evaluation Board ý Connecting the System ý Developing the Hardware and Software ý Application: A Web-Based Security System ý Other Applications ý Win Your Own! ý Sources and PDF

ON-CHIP PERIPHERAL REGISTERS

Accessing the on-chip peripherals is done through the use of internal registers mapped to various I/O port addresses. Any I/O operation to a port in the range of ports shown in Table 2 accesses the on-chip register. I/O operations to port addresses between 00 and 7F cause the external I/O signals to activate.

Address (hex)

Register category

80ý91

Programmable reload/counter timers

93ý95

Watchdog timer

96ýA5

General-purpose I/O ports

A8ýB3

Chip select/wait state generator

B4ýB5

On-chip RAM control

B6ýDF

Universal Zilog interface blocks

E0ýED

Multiply accumulator

EEýFF

DMA controllers

Table 2ýEach on-chip peripheral is controlled by multiple registers.

 

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