THE MAGAZINE FOR COMPUTER APPLICATIONS
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WHAT'S YOUR ENGINEERING QUOTIENT?

Problem 1—The following circuit was found in a telecommunications application. Its output is intended to feed one 64-kbps timeslot in a T1 or E1 circuit. (All of the flip-flops are positive-edge triggered except for U6, which is negative-edge triggered.) What exactly does it do, and why?

(Click to enlarge)

ANSWER

Problem 2—What restrictions must be placed on the input signal? Is there a way to enforce the restrictions so as not to corrupt the packet structure?

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