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by George Martin
Start ę The
Unsigned Modifier in Action ę The Signed
Notation ę A Lesson in Subtraction
ę Sources and PDF
THE UNSIGNED MODIFIER IN ACTION
The hardware rules for binary addition
follow logical or mathematical principles: 0 + 0 = 0, 1 + 0 = 1, 0
+ 1 = 1, and 1 + 1 = 10, which is referred to as a half adder in hardware.
A full adder differs in that it has a carry input. You can modify
the rules for the half adder to create a full adder (see Table 2).
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AIN
0
0
0
0
1
1
1
1
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BIN
0
0
1
1
0
0
1
1
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CIN
0
1
0
1
0
1
0
1
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Sum
0
1
1
0
1
0
0
1
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COUT
0
0
0
1
0
1
1
1
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Table 2ęTurning a half adder
into a full adder takes a bit of rule tweaking.
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The addition logic in a processor is
built from full adder logic. For example, if you add the values 10
and 25 to it, you should get 35 as an answer.
0000 1010 (10) + 0001 1001 (25) = 0010
0011 (35)
But, what if you add numbers that overflow
the 8-bit values? Letęs add 200 to 200, which equals:
1100 0100 (200) + 1100 0100 (200) =
1 1000 1000 (400)
Because you only have an 8-bit result,
the carryover gets lost. Although the carry flag is set and could
be checked for a problem, thatęs not usually done for every addition
in a program.
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