ChipCenter Questlink
SEARCH CHIPCENTER
Search Type:
Search for:




Knowledge Centers
Product Reviews
Data Sheets
Guides & Experts
News
International
Ask Us
Circuit Cellar Online
App Notes
NetSeminars
Careers
Resources
FAQ
EE Times Network
Electronics Group Sites

ANALOG BIT BOMB


Circuit Cellar Online
THE MAGAZINE FOR COMPUTER APPLICATIONS
Circuit Cellar Online offers articles illustrating creative solutions
and unique applications through complete projects, practical
tutorials, and useful design techniques.

ANALOG BIT BOMB

Silicon Online by Tom Cantrell

 

Start ý Whatýs a nV Between Friends? ý All Greek To Me ý Bank Heist ý More For Less ý Sources and PDF

BANK HEIST

The final piece of the pie is a built-in controller that handles the SPI interface, process commands (see Table 2), and performs various housekeeping tasks.

Commands

Description

OP Code

Second command byte

RDATA

Read data

0000 0001 (01H)

ý

RDATAC

Read data continuously

0000 0011 (03H)

ý

STOPC

Stop read data continuously

0000 1111 (0H)

ý

RREG

Read from REG bank "rrrr"

0001 rrrr (1xH)

xxxx_nnnn (# of reg ý 1)

RRAM

Read from RAM bank "aaa"

0010 0aaa (2xH)

xnnn_nnnn (# of bytes ý1)

CREG

Copy REGs to RAM bank "aaa"

0100 0aaa (4xH)

ý

CREGA

Copy REGs to all RAM banks

0100 1000 (48H)

ý

WREG

Write to REG "rrrr"

0101 rrrr (5xH)

xxxx_nnnn (# of reg ý 1)

WRAM

Write to RAM bank "aaa"

0110 0aaa (6xH)

xnnn_nnnn (# of bytes ý 1)

CRAM

Copy RAM bank "aaa" to REG

1100 0aaa (CxH)

ý

CSRAMX

Calculate RAM bank "aaa" checksum

1101 0aaa (DxH)

ý

CSARAMX

Calculate all RAM bank checksum

1101 1000 (D8H)

ý

CSREG

Calculate REG checksum

1101 1111 (DFH)

ý

CSRAM

Calculate RAM bank "aaa" checksum

1110 0aaa (ExH)

ý

CSARAM

Calculate all RAM banks checksum

1110 1000 (E8H)

ý

SELFCAL

Self Cal offset and gain

1111 0000 (F0H)

ý

SELFOCAL

Self Cal offset

1111 0001 (F1H)

ý

SELFGCAL

Self Cal gain

1111 0010 (F2H)

ý

SYSOCAL

System Cal offset

1111 0011 (F3H)

ý

SYSGCAL

System Cal gain

1111 0100 (F4H)

ý

DSYNC

Sync *DRDY

1111 1100 (FCH)

ý

SLEEP

Put in Sleep mode

1111 1101 (FDH)

ý

RESET

Reset to power-up values

1111 1110 (FEH)

ý

Table 2ýThe built-in controller handles the gory details with high-level commands that make life easy for the host MCU.

Because precision is the name of the game, the ý1216 offers various calibration commands that can be performed after power-on and periodically as necessary to compensate for temperature drift, sensor aging, and such. The self-calibration commands are handled internally by the ý1216, and the system-calibration commands encompass external circuitry as well. For calibrating system offset, the external analog input must be set to 0, and for system gain, set to full scale.

A particular ý1216 configuration is defined by the contents of 16 registers. With eight input channels available, itýs conceivable that a different configuration may be desired for each. Instead of the host micro having to keep track of them all and swap back and forth, the ý1216 includes eight banks of RAM (see Figure 5) and commands to copy a bank to or from the registers in one fell swoop. There are also commands to calculate the checksum for the register and RAM banks, just to be sure nothing has gone awry.

Figure 5ýEight banks of RAM and bank-level copy commands facilitate channel-specific configuration. Any banks not needed for that purpose can be used as general-purpose RAM in a pinch.

 

PREVIOUSNEXT


Circuit Cellar provides up-to-date information for engineers. Visit www.circuitcellar.com for more information and additional articles.
For subscription information, call (860) 875-2199, subscribe@circuitcellar.com or subscribe online. ýCircuit Cellar, the Magazine for Computer Applications. Posted with permission.

Click here to get your listing up.

Copyright © 2003 ChipCenter-QuestLink
About ChipCenter-Questlink  Contact Us  Privacy Statement   Advertising Information  FAQ