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SOFTWARE IMPLEMENTATION OF I²C PROTOCOL

by Dariusz Caban

Start ý The Bus ý The Protocol ý The Process ý Conclusions ý Sources and PDF

THE PROCESS

The I²C protocol does not have to be implemented in hardware. Software implementation is also possible, because the protocol is forgiving with regard to timing accuracy. And, any of the microcontrollerýs general-purpose I/O lines can be used as I²C lines. This approach is useful when a system design includes only a single master.

As stated earlier, such designs are most frequent. I have implemented the I²C protocol for the 8031 microcontroller, using only Standard mode. The source code was written in C-51. The use of a high-level programming language shortened development time considerably. It also simplifies changes and adaptation of the code to microcontrollers with different architectures.

Listing 1 presents functions performing basic operations of the I²C protocol. The functions given require 135 bytes of code memory and only a few bytes of internal data memory, if a compact memory model is set. In order to guarantee appropriate timing characteristics of signals, NOP instructions are used. An 8031 microcontroller executes a NOP instruction in one machine cycle. [2] One cycle takes 12/f_osc s, where f_osc is the oscillator frequency. The number of NOP instructions in the given functions was selected based on an oscillator frequency of 12 MHz.

Now, letýs use the set of functions given in Listing 1 to implement operations on the Atmel AT24C02 device you saw in Figure 1. This device supports 256 bytes of EEPROM. The slave address of the AT24C02 consists of a 4-bit type identifier (1010), followed by a 3-bit sequence, which corresponds to logic levels on the A2, A1, and A0 inputs. This way, up to eight EEPROMs can be addressed on the same I²C bus. The AT24C02 also has a write protect (WP) pin that provides hardware data protection.

The following operations are allowed: byte write, page write, acknowledge polling, current address read, random read, and sequential read. Listings 2 and 3 present example functions performing byte write and sequential read operations, respectively. It was assumed that a single EEPROM exists in the system.

When the microcontroller terminates the write sequence with a stop condition, the EEPROM enters an internally timed write cycle that, for the AT24C02, can last up to 10 ms. During the write cycle, the EEPROM is busy and ignores all communications on the I²C bus. The ready/busy status of the device is determined by using an acknowledge polling operation. This operation involves issuing of a start condition followed by the slave address byte. If the EEPROM does not acknowledge, the cycle is still in progress. If it does, the cycle has completed. Listing 4 presents the function performing the acknowledgement of the polling operation and its possible use.

The sequential read operation is a convenient way to get multi-byte values stored in the EEPROM. In the function presented in Listing 3, this operation is initiated by a write sequence to load the EEPROMýs internal address counter with the initial value. Then the master issues a start condition again, sends a slave address with the data direction bit high, and begins reading. After the master receives a byte and acknowledges it, the EEPROM increments the address counter and sends a successive byte. The EEPROM continues sending until the master does not acknowledge and generates a stop condition. Listing 5 shows an example of using the EEPROM_sequential_read() function.

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