|
by Dariusz Caban
Start ý The
Bus ý The Protocol ý The
Process ý Conclusions ý Sources
and PDF
CONCLUSIONS
Compared to other competing synchronous
serial interfaces, Microwire from National Semiconductor and SPI from
Motorola, I2C has the least hardware requirements. Only
two I/O pins of the microcontroller are needed to communicate with
multiple slaves, because each slave is identified by its unique address,
not by a separate select line. Also, because the I2C protocol
is level-sensitive, its noise immunity is likely to be higher than
in edge-sensitive competitors. And, unlike Microwire and SPI, I2C
slaves provide feedback to the master, which indicates whether or
not transmission was successful. Until recently, the I2C
protocol was significantly slower, but in 1999 a high-speed mode was
introduced, which offered rates up to 3.4 Mbps.
In this article, I have presented an
example all-software implementation of the Standard mode of the I2C
protocol. The source code was written in a high-level language, and
you can easily see that it is not complicated. Although the compiler
used was rather old [2], small-size executable code was produced.
PREVIOUS
NEXT
Circuit Cellar provides up-to-date information for engineers. Visit
www.circuitcellar.com for
more information and additional articles.
For subscription information, call (860) 875-2199, subscribe@circuitcellar.com
or subscribe online.
ýCircuit Cellar, the Magazine for Computer Applications. Posted with
permission. |