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ITıS TWO, TWO, TWO MEMORIES IN ONE

by Tom Cantrell

Start ı March of Memory ı Protection Racket ı Sources and PDF

Silicon Storage Technology (SST) may not be a household name to most designers, however, chances are youıre using the companyıs technology on a daily basis without even knowing it.

Although SST makes chips like a regular IC company, it also plays a major role as an OEM supplier of flash memory process know-how. SSTıs split-gate thick-oxide NOR-type SuperFlash technology is notable for simple manufacturing, using conventional CMOS fab gear, which makes it a natural for flash memory-based SOCs that combine memory with other digital functions.

SSTıs process OEMs are heavyweightsıincluding IBM, Motorola, Samsung, Sanyo, Seiko, and super-foundry TSMC. In fact, it looks like in the near future practically anyone buying a PC will be contributing to the bottom line. SST recently announced it has been licensed to supply flash memory chips compatible with the latest Intel ı800 series chipset Firmware Hub protocol.

The SST process also serves as the foundation for its own catalog of parts, including conventional flash memory chips, CompactFlash cards, and so on. SST also offered a FlashFlex51 MCU for some time, but the novelty has worn off now that everyone is jumping on the Flash-MCU bandwagon. No doubt, more than a few use the SST process.

But this month, I want to take a look at an SST part that caught my eye at the recent Embedded Systems Conference. It combines flash memory and SRAM on the same chip (see Photo 1). This concept isnıt new, but may be just now coming of age.

Photo 1ıThe new SST32VFxxx ComboMemory chips combine 8 or 16 Mb of flash memory with 2 or 4 Mb of SRAM in a 48-lead ball grid array (BGA) package smaller than a postage stamp.

Actually, the latest SST32VFxxx parts arenıt monolithic, but use separate SRAM and flash memory die combined in a multi-chip package (MCP). Although it is a hybrid, thereıs little to distinguish it from SSTıs earlier generation of monolithic parts (SST31LFxxx). SST uses a straightforward yield-based calculation to determine whether a hybrid or monolitihic implementation is more cost-effective. As silicon marches on, yesterdayıs hybrid will become tomorrowıs monolithic part, even as the next generation of higher capacity hybrids are introduced.

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